ModelSim SE User's Manual - Electrical and Computer Engineering

UM-114 5 - Verilog simulation
Compiling Verilog files
Creating a design library
ModelSim SE User’s Manual
Before you can compile your design, you must create a library in which to store the
compilation results. Use either the File > New > Library menu command in the ModelSim
GUI or the vlib (CR-356) command to create a new library. For example:
vlib work
Invoking the Verilog compiler
This creates a library named work. By default compilation results are stored in the work
library.
The work library is actually a subdirectory named work. This subdirectory contains a
special file named _info. Do not create libraries using UNIX commands – always use the
vlib command (CR-356).
See "Design libraries" (UM-57) for additional information on working with libraries.
The ModelSim Verilog compiler, vlog, compiles Verilog source code into retargetable,
executable code, meaning that the library format is compatible across all supported
platforms and that you can simulate your design on any platform without having to
recompile your design specifically for that platform. You can also access the compiler via
the Compile > Compile menu command in the ModelSim GUI (see "Compile Source Files
dialog" (GR-59) for more information).
As you compile your design, the resulting object code for modules and UDPs is generated
into a library. As noted above, the compiler places results into the work library by default.
You can specify an alternate library with the -work argument.
Here is one example of a vlog command:
vlog top.v +libext+.v+.u -y vlog_lib
After compiling top.v, vlog will scan the vlog_lib library for files with modules with the
same name as primitives referenced, but undefined in top.v. The use of +libext+.v+.u
implies filenames with a .v or .u suffix (any combination of suffixes may be used). Only
referenced definitions will be compiled.