ModelSim SE User's Manual - Electrical and Computer Engineering

H - Logic Modeling hardware models
Appendix contents
VHDL hardware model interface . . . . . . . . . . UM-628
Creating foreign architectures with hm_entity . . . . . UM-629
Vector ports . . . . . . . . . . . . . . UM-631
Hardware model commands . . . . . . . . . . UM-632
Logic Modeling hardware models can be used with ModelSim VHDL and Verilog. A
hardware model allows simulation of a device using the actual silicon installed as a
hardware model in one of Logic Modeling's hardware modeling systems. The hardware
modeling system is a network resource with a procedural interface that is accessed by the
simulator. This appendix describes how to use Logic Modeling hardware models with
ModelSim.
Note: Please refer to Logic Modeling documentation from Synopsys for details on using
the hardware modeler. This appendix only describes the specifics of using hardware
models with ModelSim SE.
UM-627
ModelSim SE User’s Manual