ModelSim SE User's Manual - Electrical and Computer Engineering

UM-74 4 - VHDL simulation
Range and index checking
Subprogram inlining
ModelSim SE User’s Manual
A range check verifies that a scalar value defined with a range subtype is always assigned
a value within its range. An index check verifies that whenever an array subscript
expression is evaluated, the subscript will be within the array's range.
Range and index checks are performed by default when you compile your design. You can
disable range checks (potentially offering a performance advantage) and index checks
using arguments to the vcom (CR-311) command. Or, you can use the NoRangeCheck and
NoIndexCheck variables in the modelsim.ini file to specify whether or not they are
performed. See "Preference variables located in INI files" (UM-524).
Range checks in ModelSim are slightly more restrictive than those specified by the VHDL
LRM. ModelSim requires any assignment to a signal to also be in range whereas the LRM
requires only that range checks be done whenever a signal is updated. Most assignments to
signals update the signal anyway, and the more restrictive requirement allows ModelSim
to generate better error messages.
ModelSim attempts to inline subprograms at compile time to improve simulation
performance. This happens automatically and should be largely transparent. However, you
can disable automatic inlining two ways:
Invoke vcom (CR-311) with the -O0 or -O1 argument
Use the mti_inhibit_inline attribute as described below
Single-stepping through a simulation varies slightly depending on whether inlining
occurred. When single-stepping to a subprogram call that has not been inlined, the
simulator stops first at the line of the call, and then proceeds to the line of the first
executable statement in the called subprogram. If the called subprogram has been inlined,
the simulator does not first stop at the subprogram call, but stops immediately at the line of
the first executable statement.
mti_inhibit_inline attribute
You can disable inlining for individual design units (a package, architecture, or entity) or
subprograms with the mti_inhibit_inline attribute. Follow these rules to use the attribute:
Declare the attribute within the design unit's scope as follows:
attribute mti_inhibit_inline : boolean;
Assign the value true to the attribute for the appropriate scope. For example, to inhibit
inlining for a particular function (e.g., "foo"), add the following attribute assignment:
attribute mti_inhibit_inline of foo : procedure is true;
To inhibit inlining for a particular package (e.g., "pack"), add the following attribute
assignment:
attribute mti_inhibit_inline of pack : package is true;
Do similarly for entities and architectures.