ModelSim SE User's Manual - Electrical and Computer Engineering

UM-34 1 - Introduction
What is an "object"
Text conventions
ModelSim SE User’s Manual
Because ModelSim works with VHDL, Verilog, and System C, an “object” refers to any
valid design element in those languages. The word "object" is used whenever a specific
language reference is not needed. Depending on the context, “object” can refer to any of
the following:
VHDL block statement, component instantiation, constant, generate
statement, generic, package, signal, alias, or variable
Verilog function, module instantiation, named fork, named begin, net,
task, register, or variable
SystemC module, channel, port, variable, or aggregate
Text conventions used in this manual include:
italic text provides emphasis and sets off filenames, pathnames, and
design unit names
bold text indicates commands, command options, menu choices,
package and library logical names, as well as variables,
dialog box selections, and language keywords
monospace type monospace type is used for program and command examples
The right angle (>) is used to connect menu choices when traversing menus as
in: File > Quit
path separators examples will show either UNIX or Windows path
separators - use separators appropriate for your operating
system when trying the examples
UPPER CASE denotes file types used by ModelSim (e.g., DO, WLF, INI,
MPF, PDF, etc.)