24.03.2013 Views

ModelSim SE User's Manual - Electrical and Computer Engineering

ModelSim SE User's Manual - Electrical and Computer Engineering

ModelSim SE User's Manual - Electrical and Computer Engineering

SHOW MORE
SHOW LESS

You also want an ePaper? Increase the reach of your titles

YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.

UM-92 4 - VHDL simulation<br />

Using alternative input/output files<br />

Flushing the TEXTIO buffer<br />

Providing stimulus<br />

<strong>ModelSim</strong> <strong>SE</strong> User’s <strong>Manual</strong><br />

You can use the TextIO package to read <strong>and</strong> write to your own files. To do this, just declare<br />

an input or output file of type TEXT. For example, for an input file:<br />

The VHDL’87 declaration is:<br />

file myinput : TEXT is in "pathname.dat";<br />

The VHDL’93 declaration is:<br />

file myinput : TEXT open read_mode is "pathname.dat";<br />

Then include the identifier for this file ("myinput" in this example) in the READLINE or<br />

WRITELINE procedure call.<br />

Flushing of the TEXTIO buffer is controlled by the UnbufferedOutput (UM-534) variable in<br />

the modelsim.ini file.<br />

You can stimulate <strong>and</strong> test a design by reading vectors from a file, using them to drive<br />

values onto signals, <strong>and</strong> testing the results. A VHDL test bench has been included with the<br />

<strong>ModelSim</strong> install files as an example. Check for this file:<br />

/modeltech/examples/stimulus.vhd

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!