ModelSim SE User's Manual - Electrical and Computer Engineering

UM-428 17 - Signal Spy
Example
ModelSim SE User’s Manual
library IEEE, modelsim_lib;
use IEEE.std_logic_1164.all;
use modelsim_lib.util.all;
entity testbench is
end;
architecture only of testbench is
signal release_flag : std_logic;
begin
stim_design : process
begin
...
wait until release_flag = '1';
signal_release("/testbench/dut/blk1/data", 1);
signal_release("/testbench/dut/blk1/clk", 1);
...
end process stim_design;
...
end;
The above example releases any forces on the signals data and clk when the signal
release_flag is a "1". Both calls will send a message to the transcript stating which signal
was released and when.