ModelSim SE User's Manual - Electrical and Computer Engineering

Example
Simulating with an elaboration file UM-141
Upon first simulating the design, use vsim -elab
to create an elaboration file that will be used in subsequent
simulations.
In subsequent simulations you simply load the elaboration file (rather than the design) with
vsim -load_elab .
To change the stimulus without recoding, recompiling, and reloading the entire design,
Modelsim allows you to map the stimulus file (or files) of the original design unit to an
alternate file (or files) with the -filemap_elab switch. For example, the VHDL code for
initiating stimulus might be:
FILE vector_file : text IS IN "vectors";
where vectors is the stimulus file.
If the alternate stimulus file is named, say, alt_vectors, then the correct syntax for changing
the stimulus without recoding, recompiling, and reloading the entire design is as follows:
vsim -load_elab -filemap_elab vectors=alt_vectors
ModelSim SE User’s Manual