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ModelSim SE User's Manual - Electrical and Computer Engineering

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Simulating Verilog designs UM-135<br />

<strong>ModelSim</strong> helps you track down event order dependencies with the following compiler<br />

arguments: -compat, -hazards, <strong>and</strong> -keep_delta.<br />

See the vlog comm<strong>and</strong> (CR-358) for descriptions of -compat <strong>and</strong> -keep_delta.<br />

Hazard detection<br />

The -hazard argument to vsim (CR-373) detects event order hazards involving simultaneous<br />

reading <strong>and</strong> writing of the same register in concurrently executing processes. vsim detects<br />

the following kinds of hazards:<br />

WRITE/WRITE:<br />

Two processes writing to the same variable at the same time.<br />

READ/WRITE:<br />

One process reading a variable at the same time it is being written to by another process.<br />

<strong>ModelSim</strong> calls this a READ/WRITE hazard if it executed the read first.<br />

WRITE/READ:<br />

Same as a READ/WRITE hazard except that <strong>ModelSim</strong> executed the write first.<br />

vsim issues an error message when it detects a hazard. The message pinpoints the variable<br />

<strong>and</strong> the two processes involved. You can have the simulator break on the statement where<br />

the hazard is detected by setting the break on assertion level to Error.<br />

To enable hazard detection you must invoke vlog (CR-358) with the -hazards argument<br />

when you compile your source code <strong>and</strong> you must also invoke vsim with the -hazards<br />

argument when you simulate.<br />

Important: Enabling -hazards implicitly enables the -compat argument. As a result,<br />

using this argument may affect your simulation results.<br />

Limitations of hazard detection<br />

Reads <strong>and</strong> writes involving bit <strong>and</strong> part sel ects of vectors are not considered for hazard<br />

detection. The overhead of tracking the overlap between the bit <strong>and</strong> part selects is too<br />

high.<br />

A WRITE/WRITE hazard is flagged even if the same value is written by both processes.<br />

A WRITE/READ or READ/WRITE hazard is flag ged even if the write does not modify<br />

the variable's value.<br />

Glitches on nets caused by non-guaranteed event ordering are not detected.<br />

<strong>ModelSim</strong> <strong>SE</strong> User’s <strong>Manual</strong>

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