ModelSim SE User's Manual - Electrical and Computer Engineering

UM-554 C - Error and warning messages
Too few port connections
ModelSim SE User’s Manual
Message text
# ** Warning (vsim-3017): foo.v(1422): [TFMPC] - Too few port connections.
Expected 2, found 1.
# Region: /foo/tb
Meaning
This warning occurs when an instantiation has fewer port connections than the
corresponding module definition. The warning doesn’t necessarily mean anything is
wrong; it is legal in Verilog to have an instantiation that doesn’t connect all of the pins.
However, someone that expects all pins to be connected would like to see such a warning.
Here are some examples of legal instantiations that will and will not cause the warning
message.
Module definition:
module foo (a, b, c, d);
Instantiation that does not connect all pins but will not produce the warning:
foo inst1(e, f, g, ); – positional association
foo inst1(.a(e), .b(f), .c(g), .d()); – named association
Instantiation that does not connect all pins but will produce the warning:
foo inst1(e, f, g); – positional association
foo inst1(.a(e), .b(f), .c(g)); – named association
Any instantiation above will leave pin d unconnected but the first example has a
placeholder for the connection. Here’s another example:
foo inst1(e, , g, h);
foo inst1(.a(e), .b(), .c(g), .d(h));
Suggested actions
Check that there is not an extra comma at th e end of the port list. (e.g., model(a,b,) ). The
extra comma is legal Verilog and implies that there is a third port connection that is
unnamed.
If you are purposefully leaving pins unco nnected, you can disable these messages using
the +nowarnTFMPC argument to vsim.