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ModelSim SE User's Manual - Electrical and Computer Engineering

ModelSim SE User's Manual - Electrical and Computer Engineering

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[vsim] simulator control variables<br />

Preference variables located in INI files UM-529<br />

Variable name Value range Purpose Default<br />

AssertFile any valid<br />

filename<br />

alternative file for storing VHDL or PSL<br />

assertion messages<br />

AssertionFailAction 0, 1, 2 sets action for a PSL failure event; use 0 for<br />

continue, 1 for break, 2 for exit<br />

transcript<br />

continue (0)<br />

AssertionFailEnable 0, 1 turns on failure tracking for PSL assertions on (1)<br />

AssertionFailLimit Any positive<br />

integer <strong>and</strong> -1<br />

sets limit for the number of times<br />

<strong>ModelSim</strong> will respond to a PSL assertion<br />

failure event; after the limit is reached on a<br />

particular assertion, that assertion is<br />

disabled; use -1 for infinity<br />

AssertionFailLog 0, 1 turns on transcript logging for PSL<br />

assertion failure events<br />

AssertionFormat see next column defines format of VHDL assertion<br />

messages; fields include:<br />

%S - severity level<br />

%R - report message<br />

%T - time of assertion<br />

%D - delta<br />

%I - instance or region pathname (if<br />

available)<br />

%i - instance pathname with process<br />

%O - process name<br />

%K - kind of object path points to; returns<br />

Instance, Signal, Process, or Unknown<br />

%P - instance or region path without leaf<br />

process<br />

%F - file<br />

%L - line number of assertion, or if from<br />

subprogram, line from which call is made<br />

%% - print ’%’ character<br />

AssertionFormatBreak see<br />

AssertionFormat<br />

above<br />

AssertionFormatError see<br />

AssertionFormat<br />

above<br />

defines format of messages for VHDL<br />

assertions that trigger a breakpoint; see<br />

AssertionFormat for options<br />

defines format of messages for VHDL<br />

Error assertions; see AssertionFormat for<br />

options; if undefined, AssertionFormat is<br />

used unless assertion causes a breakpoint in<br />

which case AssertionFormatBreak is used<br />

1<br />

on (1)<br />

"** %S:<br />

%R\n Time:<br />

%T<br />

Iteration:<br />

%D%I\n"<br />

"** %S:<br />

%R\n<br />

Time: %T<br />

Iteration:<br />

%D %K: %i<br />

File: %F\n"<br />

"** %S:<br />

%R\n<br />

Time: %T<br />

Iteration:<br />

%D %K: %i<br />

File: %F\n"<br />

<strong>ModelSim</strong> <strong>SE</strong> User’s <strong>Manual</strong>

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