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ModelSim SE User's Manual - Electrical and Computer Engineering

ModelSim SE User's Manual - Electrical and Computer Engineering

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UM-156 5 - Verilog simulation<br />

Sparse memory modeling<br />

<strong>ModelSim</strong> <strong>SE</strong> User’s <strong>Manual</strong><br />

Sparse memories are a mechanism for allocating storage for memory elements only when<br />

they are needed. You mark which memories should be treated as sparse, <strong>and</strong> <strong>ModelSim</strong><br />

dynamically allocates memory for the accessed addresses during simulation.<br />

Sparse memories are more efficient in terms of memory consumption, but access times to<br />

sparse memory elements during simulation are slower. Thus, sparse memory modeling<br />

should be used only on memories whose active addresses are "few <strong>and</strong> far between."<br />

There are two methods of enabling sparse memories:<br />

“<strong>Manual</strong>ly” by inserting attributes or meta-comments in your code<br />

Automatically by setting the SparseMemThreshhold (UM-526) variable in the<br />

modelsim.ini file<br />

<strong>Manual</strong>ly marking sparse memories<br />

You can mark memories in your code as sparse using either the mti_sparse attribute or the<br />

sparse meta-comment. For example:<br />

(* mti_sparse *) reg mem [0:1023]; // Using attribute<br />

reg /*sparse*/ [0:7] mem [0:1023]; // Using meta-comment<br />

The meta-comment syntax is supported for compatibility with other simulators.<br />

Automatically enabling sparse memories<br />

Using the SparseMemThreshhold (UM-526) .ini variable, you can instruct <strong>ModelSim</strong> to<br />

mark as sparse any memory that is a certain size. Consider this example:<br />

If SparseMemThreshold = 2048 then<br />

reg mem[0:2047]; // will be marked as sparse automatically<br />

reg mem[0:2046]; // will not be marked as sparse<br />

Combining automatic <strong>and</strong> manual modes<br />

Because mti_sparse is a Verilog 2001 attribute that accepts values, you can enable<br />

automatic sparse memory modeling but still control individual memories within your code.<br />

Consider this example:<br />

If SparseMemThreshold = 2048 then<br />

reg mem[0:2047]; // will be marked as sparse automatically<br />

reg mem[0:2046]; // will not be marked as sparse<br />

However, you can override this automatic behavior using mti_sparse with a value:<br />

(* mti_sparse = 0 *) reg mem[0:2047]; // will *not* be marked as sparse even<br />

though SparseMemThreshold = 2048<br />

(* mti_sparse = 1*) reg mem[0:2046]; // will be marked as sparse even though<br />

SparseMemThreshold = 2048

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