MVME5100 Single Board Computer Programmer's Reference Guide

2
Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
Endian Conversion
Notes 1. “1000” is the default setting.
2. Parking disabled is a test mode only and should not be
used, since no one will drive the PCI bus when in an idle
state.
3. All other combinations in the PRK setting not specified in the
table are invalid and should not be used.
A special function is added to the PCI arbiter to hold the grant asserted
through a lock cycle. When the “POL” bit in the PCI arbiter control
register is set, the grant associated with the agent initiating the lock cycle
will be held asserted until the lock cycle is complete. If this bit is clear, the
arbiter does not distinguish between lock and non-lock cycle.
The PHB supports both big- and little-endian data formats. Since the PCI
bus is inherently little-endian, conversion is necessary if all PPC devices
are configured for big-endian operation. The PHB may be programmed to
perform the endian conversion described below.
When PPC Devices are Big-Endian
When all PPC devices are operating in big-endian mode, all data to/from
the PCI bus must be swapped such that the PCI bus looks big endian from
the PPC bus’s perspective. This association is true regardless of whether
the transaction originates on the PCI bus or the PPC bus. This is shown in
Figure 2-7.
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