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MVME5100 Single Board Computer Programmer's Reference Guide

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2<br />

Hawk PCI Host Bridge & Multi-Processor Interrupt Controller<br />

WLRTx Write Lock Resolution Threshold. This field is used by<br />

the PHB to determine a PPC bound write FIFO threshold<br />

at which a bridge lock resolution will create a retry on a<br />

pending PCI bound transaction. The encoding of this field<br />

is shown in the following table.<br />

WLRT Write lock resolution threshold<br />

00 Match write threshold mode (i.e. PSATTx WXFT)<br />

01 Immediate<br />

10 FIFO full<br />

11 FIFO full<br />

RLRTx Read Lock Resolution Threshold. This field is used by<br />

the PHB to determine a PPC bound read FIFO threshold<br />

at which a bridge lock resolution will create a retry on a<br />

pending PCI bound transaction. The encoding of this field<br />

is shown in the following table.<br />

RLRT Read lock resolution threshold<br />

00 Match read threshold mode (i.e. PSATTx RXFT or RMFT)<br />

01 Immediate<br />

10 FIFO less than 1 cache line<br />

11 FIFO less than 1 cache line<br />

The PPC Prescaler Adjust Register (XPAD) is used to specify a scale<br />

factor for the prescaler to ensure that the time base for the bus timer is<br />

1MHz. The scale factor is calculated as follows:<br />

XPAD = 256 - Clk,<br />

where Clk is the frequency of the CLK input in MHz. The following table<br />

shows the scale factors for some common CLK frequencies.<br />

Frequency XPAD<br />

100 $9C<br />

83 $AD<br />

66 $BE<br />

50 $CE<br />

2-78 <strong>Computer</strong> Group Literature Center Web Site

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