MVME5100 Single Board Computer Programmer's Reference Guide

2
Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
The register fields are defined as follows:
REG Register Number. Configuration Cycles: Identifies a
target double word within a target’s configuration space.
This field is copied to the PCI AD bus during the address
phase of a Configuration cycle.
Special Cycles: This field must be written with all zeros.
FUN Function Number. Configuration Cycles: Identifies a
function number within a target’s configuration space.
This field is copied to the PCI AD bus during the address
phase of a Configuration cycle.
Special Cycles: This field must be written with all ones.
DEV Device Number. Configuration Cycles: Identifies a
target’s physical PCI device number. Refer to the section
on Generating PCI Cycles for a description of how this
field is encoded.
Special Cycles: This field must be written with all ones.
BUS Bus Number. Configuration Cycles: Identifies a targeted
bus number. If written with all zeros, a Type 0
Configuration Cycle will be generated. If written with any
value other than all zeros, then a Type 1 Configuration
Cycle will be generated.
Special Cycles: Identifies a targeted bus number. If
written with all zeros, a Special Cycle will be generated.
If written with any value other than all zeros, then a
Special Cycle translated into a Type 1 Configuration
Cycle will be generated.
EN Enable. Configuration Cycles: Writing a one to this bit
enables CONFIG_DATA to Configuration Cycle
translation. If this bit is a zero, subsequent accesses to
CONFIG_DATA will be passed though as I/O Cycles.
Special Cycles: Writing a one to this bit enables
CONFIG_DATA to Special Cycle translation. If this bit is
a zero, subsequent accesses to CONFIG_DATA will be
passed though as I/O Cycles.
2-108 Computer Group Literature Center Web Site