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MVME5100 Single Board Computer Programmer's Reference Guide

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Introduction<br />

CVMEbus Mapping Example<br />

C<br />

This appendix contains an application note on establishing addressability<br />

on the VMEbus using the <strong>MVME5100</strong> and MVME2700 boards as<br />

examples. Future Motorola board level documents may contain additional<br />

application notes aimed at clarifying configuration or implementation<br />

issues that have been noted by several Motorola customers. If you are<br />

unsure if this application will work on your particular product<br />

configuration, contact your Motorola sales representative.<br />

The following paragraphs describe the setup of Universe chip registers,<br />

using the <strong>MVME5100</strong> and MVME2700 in order to establish<br />

communication across a VMEbus. The scenario is simplistic at best and<br />

does not presuppose operational consistency involving multiple<br />

representations of these and other MVME boards. In this description, all<br />

64MB of both boards are mapped onto the VMEbus in A32/D32 space.<br />

The specific slave image register set used was arbitrary, but based most<br />

nearly on those setup correctly by PPCBug’s default settings. These are<br />

displayed in the following table:.<br />

Table C-1. MVME2700/<strong>MVME5100</strong> Sample Slave Image Settings<br />

PCI Slave 1<br />

Original<br />

PCI Slave 1<br />

Modified<br />

VME Slave 0<br />

Original<br />

VME Slave 0<br />

Modified<br />

2700: Control C082 0000 C082 0000 E0F2 0000 E0F2 0000<br />

2700: Base 0100 0000 0100 0000 0000 0000 1000 0000<br />

2700: Bound 2000 0000 2000 0000 0400 0000 13FF FFFF<br />

2700: Translate 0000 0000 FF00 0000 8000 0000 7000 0000<br />

5100: Control C082 0000 C082 0000 E0F2 0000 E0F2 0000<br />

5100: Base 8100 0000 8100 0000 0000 0000 1400 0000<br />

5100: Bound A000 0000 A000 0000 0400 0000 17FF FFFF<br />

5100: Translate 8000 0000 7F00 0000 0000 0000 EC00 0000<br />

C-1

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