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MVME5100 Single Board Computer Programmer's Reference Guide

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!<br />

Caution<br />

Programming Model<br />

sien When sien is set, the logging of a single-bit error causes<br />

the int bit to be set if it is not already. When the int bit is<br />

set, the Hawk’s internal error interrupt is asserted.<br />

mien When mien is set, the logging of a non-correctable error<br />

causes the int bit to be set if it is not already. When the int<br />

bit is set, the Hawk’s internal error interrupt is asserted.<br />

int int is set when one of the SMC’s interrupt conditions<br />

occurs. It is cleared by reset or by software writing a one<br />

to it. The Hawk’s internal error interrupt tracks int. When<br />

int is set, Hawk’s internal error interrupt is asserted. When<br />

int is cleared, Hawk’s internal error interrupt is negated.<br />

mbe_me When mbe_me is set, the detection of a multiple-bit error<br />

during a PowerPC read or write to SDRAM causes the<br />

SMC to pulse its machine check interrupt request pin<br />

(MCHK0_) true. When mbe_me is cleared, the SMC<br />

does not assert its MCHK0_ pin on multiple-bit errors.<br />

The SMC never asserts its MCHK0_ pin in response to a<br />

multiple-bit error detected during a scrub cycle.<br />

The Hawk’s internal error interrupt and the MCHK0_ pin are the only nonpolled<br />

notification that a multiple-bit error has occurred. The SMC does<br />

not assert TEA as a result of a multiple bit error. In fact, the SMC does not<br />

have a TEA_ signal pin and it assumes that the system does not implement<br />

TEA.<br />

http://www.motorola.com/computer/literature 3-49<br />

3

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