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MVME5100 Single Board Computer Programmer's Reference Guide

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3<br />

System Memory Controller (SMC)<br />

Error_Address Register<br />

0 R<br />

RR<br />

X<br />

XX<br />

Address<br />

Bit<br />

$FEF80038<br />

Name ERROR_ADDRESS<br />

Operation READ ONLY<br />

Reset 0 P<br />

0<br />

1<br />

2<br />

3<br />

4<br />

5<br />

6<br />

7<br />

8<br />

9<br />

10<br />

11<br />

12<br />

13<br />

14<br />

15<br />

16<br />

17<br />

18<br />

19<br />

20<br />

21<br />

22<br />

23<br />

24<br />

25<br />

26<br />

27<br />

28<br />

29<br />

30<br />

31<br />

ERROR_ADDRESS These bits reflect the value that corresponds to bits 0-28<br />

of the PPC60x address bus when the SMC last logged an<br />

error during a PowerPC access to SDRAM. They reflect<br />

the value of the SCRUB ADDRESS counter if the error<br />

was logged during a scrub cycle.<br />

Scrub/Refresh Register<br />

Address $FEF80040<br />

Bit<br />

Name<br />

Operation<br />

Reset<br />

scb0, scb1 These bits increment every time the scrubber completes a<br />

scrub of the entire SDRAM. When they reach binary 11,<br />

they roll over to binary 00 and continue. These bits are<br />

cleared by power-up reset.<br />

swen When set, swen allows the scrubber to perform write<br />

cycles. When cleared, swen prevents scrubber writes.<br />

0<br />

0<br />

0<br />

1<br />

2<br />

3<br />

4<br />

5<br />

6<br />

7<br />

8<br />

9<br />

10<br />

11<br />

12<br />

13<br />

14<br />

15<br />

16<br />

17<br />

18<br />

19<br />

20<br />

21<br />

22<br />

23<br />

24<br />

25<br />

26<br />

27<br />

28<br />

29<br />

30<br />

31<br />

scb0<br />

scb1<br />

0<br />

0<br />

0<br />

0<br />

0<br />

swen<br />

R<br />

R<br />

R<br />

R<br />

R<br />

R<br />

R<br />

R/W<br />

0 P<br />

0 P<br />

X<br />

X<br />

X<br />

X<br />

X<br />

0 P<br />

SCRUB FREQUENCY<br />

READ ZERO READ ZERO READ/WRITE<br />

X X $00 P<br />

SCRUB_FREQUENCY Determines the rate of scrubbing by setting the roll-over<br />

count for the scrub prescale counter. Each time the SMC<br />

performs a refresh burst, the scrub prescale counter<br />

increments by one. When the scrub prescale counter<br />

reaches the value stored in this register, it clears and<br />

resumes counting starting at 0.<br />

3-52 <strong>Computer</strong> Group Literature Center Web Site

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