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MVME5100 Single Board Computer Programmer's Reference Guide

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4Hawk Programming Details<br />

Introduction<br />

PCI Arbitration<br />

4<br />

This chapter contains details of several programming functions associated<br />

with the Hawk ASIC chip.<br />

PCI arbitration must be provided by the host board.<br />

Hawk MPIC External Interrupts<br />

MPIC<br />

IRQ<br />

The <strong>MVME5100</strong> Hawk MPIC is fully compliant with the industry<br />

standard Multi-Processor Interrupt Controller Specification. Following a<br />

power-up reset, the MPIC is configured to operate in the parallel interrupt<br />

delivery mode on the <strong>MVME5100</strong> series:<br />

Edge/<br />

Level<br />

Table 4-1. MPIC Interrupt Assignments<br />

Polarity Interrupt Source Notes<br />

IRQ0 Level High PIB (8259) from IPMC761 in PMC Slot 1 3<br />

IRQ1 Level Low TL16C550 UART Serial Port 1, 2 1, 4<br />

IRQ2 Level Low PCI-Ethernet Device Port 1 (Front panel)<br />

IRQ3 Level Low Hawk WDT1O_L / WDT2O_L 5<br />

IRQ4 Level Low Thermal Alarm output (TOUT) of Dallas<br />

Semiconductor DS1621<br />

IRQ5 Level Low PCI-VME INT 0 (Universe LINT0#) 2<br />

IRQ6 Level Low PCI-VME INT 1 (Universe LINT1#) 2<br />

IRQ7 Level Low PCI-VME INT 2 (Universe LINT2#) 2<br />

IRQ8 Level Low PCI-VME INT 3 (Universe LINT3#) 2<br />

6<br />

4-1

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