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MVME5100 Single Board Computer Programmer's Reference Guide

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Normal<br />

View of<br />

Data<br />

(rwcb=0)<br />

Check-bit<br />

View<br />

(rwcb=1)<br />

0<br />

64 bits<br />

0 1 2 3 4 5 6 7<br />

Figure 3-10. Read/Write Check-bit Data Paths<br />

Programming Model<br />

Note that if test software attempts to force a single-bit error to a location<br />

using the rwcb function, the scrubber may correct the location before the<br />

test software gets a chance to check for the single-bit error. This can be<br />

avoided by disabling scrub writes. Also note that writing bad check-bits<br />

can set the elog bit in the Error Logger Register. The writing of check-bits<br />

causes the SMC to perform a read-modify-write to SDRAM. If the location<br />

to which check-bits are being written has a single- or double-bit error, data<br />

in the location may be altered by the write check-bits operation. To avoid<br />

this, it is recommended that the derc bit also be set while the rwcb bit is<br />

set. A possible sequence for performing read-write check-bits is as<br />

follows:<br />

1. Disable scrub writes by clearing the swen bit if it is set.<br />

2. Make sure software is not using DRAM at this point, because while<br />

rwcb is set, DRAM will not function as normal memory.<br />

3. Set the derc and rwcb bits in the Data Control register.<br />

4. Perform the desired read and/or write check-bit operations.<br />

http://www.motorola.com/computer/literature 3-47<br />

3

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