MVME5100 Single Board Computer Programmer's Reference Guide

3
System Memory Controller (SMC)
DEVICE ADDR
WORD ADDR 1
DATA 1
DATA n
SDA
M
START S
B
A
W
C
R
K
A
C
K
A
C
K
A
C
K
STOP
BEGIN
READ I 2 C STATUS REG
CMPLT=1? N
LOAD “$09” (START CONDITION) TO
I 2 C CONTROL REG
LOAD “DEVICE ADDR+WR BIT” TO
I 2 C TRANSMITTER DATA REG
LOAD “WORD ADDR 1” TO
I 2 C TRANSMITTER DATA REG
Y
READ I 2 C STATUS REG
CMPLT=ACKIN=1?
Y
READ I 2 C STATUS REG
CMPLT=ACKIN=1?
Y
N
N
*
*
LOAD “DATA1 ... DATA n” TO
I 2 C TRANSMITTER DATA REG
READ I 2 C STATUS REG
CMPLT=ACKIN=1?
LOAD “$05” (STOP CONDITION) TO
I 2 C CONTROL REG
LOAD “DUMMY DATA” TO
I 2 C TRANSMITTER DATA REG
Figure 3-8. Programming Sequence for I 2 C Page Write
3-30 Computer Group Literature Center Web Site
Y
LAST BYTE ?
READ I 2 C STATUS REG
CMPLT=1?
Y
END
ACK from Slave Device
(*): Stop condition should be generated to abort the transfer after a software wait loop (~1ms) has been expired
Y
N
N
N
*