MVME5100 Single Board Computer Programmer's Reference Guide

3
System Memory Controller (SMC)
Software should only set the tben_en bit when there is no
external L2 cache connected to the I2clm_ pin and when
there is no external register set.
REVID The REVID bits are hard-wired to indicate the revision
level of the SMC. The value for the first revision is $01.
aonly_en Normally, the SMC responds to address-only cycles only
if they fall within the address range of one of its enabled
map decoders. When the aonly_en bit is set, the SMC also
responds to address-only cycles that fall outside of the
range of its enabled map decoders provided they are not
acknowledged by some other slave within 8 clock periods.
aonly_en is read-only and reflects the level that was on
the RD4 pin at power-up reset time.
isa_hole When it is set, isa_hole disables any of the SDRAM or
ROM/Flash blocks from responding to PowerPC accesses
in the range from $000A0000 to $000BFFFF. This has the
effect of creating a hole in the SDRAM memory map for
accesses to ISA. When isa_hole is cleared, there is no hole
created in the memory map.
pu_stat0-pu_stat3 pu_stat0, pu_stat1, pu_stat2, and pu_stat3 are readonly
status bits that indicate the levels that were on the
RD13, RD14, RD15, and RD16 signal pins respectively at
power-up reset. They provide a means to pass information
to software using pull-up/pull-down resistors on the RD
bus or on a buffered RD bus.
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