MVME5100 Single Board Computer Programmer's Reference Guide

ROM Speed Attributes Registers
Programming Model
rom b we When rom b we is set, writes to Block B ROM/Flash are
enabled. When rom b we is cleared, they are disabled.
Refer back to Table 3-13 for more details.
Address $FEF80060
Bit
Name
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Operation READ ZERO READ ZERO READ ZERO
Reset X X X
0
0
rom a spd0
rom a spd1
0
0
rom b spd0
rom b spd1
R
R
R/W
R/W
R
R
R/W
R/W
X
X
0 PL
0 PL
X
X
0 PL
0 PL
rom_a_spd0,1 rom_a_spd0,1 determine the access timing used for
ROM/Flash Block A. The encoding of these bits are
shown in Table 3-15.
The device access times shown in the table are
conservative and allow time for buffers on address,
control, and data signals. For more accurate information
see the section entitled Timing Specifications for
ROM/Flash Signals further on in this manual, along with
the section titled ROM/Flash Read Timing Diagram.
http://www.motorola.com/computer/literature 3-59
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