MVME5100 Single Board Computer Programmer's Reference Guide

Functional Description
When the width status bit is cleared, the block’s ROM /Flash is
considered to be 16 bits wide, where each half of the SMC interfaces
to 8 bits. In this mode, the following rules are enforced:
a. only single-byte writes are allowed (all other sizes are ignored),
and
b. all reads are allowed (multiple accesses are performed to the
ROM/Flash devices when the read is for greater than one byte).
When the width status bit is set, the block’s ROM/Flash is
considered to be 64 bits wide, where each half of the SMC interfaces
with 32 bits. In this mode, the following rules are enforced:
a. only aligned, 4-byte writes should be attempted (all other sizes
are ignored), and
b. all reads are allowed (multiple accesses to the ROM/Flash
device are performed for burst reads).
More information about ROM/Flash is found in the following sections in
this chapter.
In order to place code correctly in the ROM/Flash devices, address
mapping information is required. Table 3-3 shows how PPC60x addresses
map to the ROM/Flash addresses when ROM/Flash is 16 bits wide. Table
3-4 shows how they map when Flash is 64 bits wide.
http://www.motorola.com/computer/literature 3-15
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