MVME5100 Single Board Computer Programmer's Reference Guide

Processor/Memory Domain
MPIC’s Involvement
PCI Domain
Endian Issues
The MPC750 processor can operate in both Big-Endian and Little-Endian
modes. However, it always treats the external processor/memory bus as
Big-Endian by performing address rearrangement and reordering when
running in Little-Endian mode.
The MPIC registers inside the Hawk, the registers inside the SMC, the
SDRAM, the ROM/FLASH, and the system registers always appear as
Big-Endian.
Since PCI is Little-Endian, the MPIC performs byte swapping in both
directions (from PCI to memory and from the processor to PCI). This is in
order to maintain address invariance when it is programmed to operate in
Big-Endian mode with the processor and the memory sub-system.
In Little-Endian mode, it reverse-rearranges the address for PCI-bound
accesses and rearranges the address for memory-bound accesses
(from PCI). In this case, no byte swapping is done.
The PCI bus is inherently Little-Endian and all devices connected directly
to PCI will operate in Little-Endian mode, regardless of the mode of
operation in the processor’s domain.
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