VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader/Splitter for Blackfin Processors
6. Select Change hex output kernel code start address to specify the
Start address (Intel hex format) for the second-stage loader code.
This option allows you to place the second-stage loader file at a
specific location within the flash/PROM.
7. Click OK to complete the loader setup.
Using ROM Splitter
Unlike the loader utility, the splitter does not format the application data
when transforming a .dxe file to an .ldr file. It emits raw data only.
Whether data and/or instruction segments are processed by the loader or
by the splitter utility depends upon the LDF’s TYPE() command. Segments
declared with TYPE(RAM) are consumed by the loader utility, and
segments declared by TYPE(ROM) are consumed by the splitter.
Figure 2-41 shows a sample Load: Splitter page with ROM splitter
options. With the Enable ROM splitter box unchecked, only TYPE(RAM)
segments are processed and all TYPE(ROM) segments are ignored by the
loader utility. If the box is checked, TYPE(RAM) segments are ignored, and
TYPE(ROM) segments are processed by the splitter utility.
The Mask Address field masks all EPROM address bits above or equal to
the number specified. For example, Mask Address = 29 (default) masks all
bits above and including A29 (ANDed by 0x1FFF FFFF). Thus, 0x2000 0000
becomes 0x0000 0000. The valid numbers are integers 0 through 32 but,
based on your specific input file, the value can be within a subset of
[0, 32].
ADSP-BF535 and ADSP-BF531/BF532/BF533/BF534/
BF536/BF537/BF538/BF539 Processor No-Boot Mode
The hardware settings of BMODE = 000 for ADSP-BF535 processors or
BMODE = 00 for ADSP-BF531, ADSP-BF532, and ADSP-BF533 processors
select the no-boot option. In this mode of operation, the on-chip
boot kernel is bypassed after reset, and the processor starts fetching and
VisualDSP++ 4.5 Loader and Utilities Manual 2-79