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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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ADSP-2126x/2136x/2137x Processor Booting<br />

Table 5-10. Default Settings for PROM <strong>and</strong> SPI Boot Modes<br />

Boot Type<br />

Selection<br />

Host<br />

Width<br />

Booting From an SPI Flash<br />

Output Format Bit Reverse Initial Word<br />

-bprom 8 Intel hex No -<br />

-bspislave 32 ASCII No -<br />

-bspiflash 32 ASCII No -<br />

-bspimaster 32 ASCII No 0x000000a5<br />

-bspiprom 8 Intel Hex Yes 0xa5<br />

For SPI flash devices, the format of the boot stream is identical to that<br />

used in SPI slave mode, with the first byte of the boot stream being the<br />

first byte of the kernel. This is because SPI flash devices do not drive out<br />

data until they receive an 8-bit comm<strong>and</strong> <strong>and</strong> a 24-bit address.<br />

Booting From an SPI PROM (16-bit address)<br />

Figure 5-2 shows the initial 32-bit word sent out from the processor from<br />

the perspective of the serial PROM device.<br />

As shown in Figure 5-2, SPI EEPROMs only require an 8-bit opcode <strong>and</strong><br />

a 16-bit address. These devices begin transmitting on clock cycle 24.<br />

However, because the processor is not expecting data until clock cycle 32,<br />

it is necessary for the loader to pad an extra byte to the beginning of the<br />

boot stream when programming the PROM. In other words, the first byte<br />

of the boot kernel is the second byte of the boot stream. The <strong>VisualDSP++</strong><br />

tools automatically h<strong>and</strong>les this in the loader file generation process for<br />

SPI PROM devices.<br />

5-16 <strong>VisualDSP++</strong> <strong>4.5</strong> <strong>Loader</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Manual</strong>

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