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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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INDEX<br />

R<br />

-r #, splitter switch, 7-6<br />

-ram, splitter switch, 7-5, 7-6<br />

RBAM bit, 4-7<br />

RBWS bit, 4-7<br />

RD pin, 3-10, 4-8<br />

references, file formats, A-17<br />

RESET<br />

interrupt service routine, 2-4, 2-19, 2-43,<br />

4-12<br />

pin, 3-9, 4-8, 4-11, 6-3<br />

reset<br />

processor, introduction to, 1-13, 1-14<br />

ADSP-2106x/160 processors, 3-3, 3-8,<br />

3-11, 3-12, 3-16<br />

ADSP-21161 processors, 4-3, 4-6, 4-7,<br />

4-9, 4-10, 4-13, 4-15<br />

ADSP-2126x/36x/37x processors, 5-3,<br />

5-10, 5-11, 5-17, 5-19<br />

ADSP-BF561/6 processors, 2-42, 2-43,<br />

2-79<br />

Blackfin processors, 2-2, 2-6, 2-16<br />

dual-core Blackfin processors, 2-42<br />

SHARC processors, 5-6<br />

TigerSHARC processors, 6-2, 6-3, 6-4<br />

vector addresses, 3-4, 3-9, 3-14, 4-20,<br />

5-21<br />

vector routine, 2-82, 4-9<br />

reset vector addresses, 3-9<br />

resistors (pull-up), 2-21, 2-24, 2-25, 6-3<br />

restrictions, second-stage loader, 2-15<br />

-retainSecondStageKernel, loader switch<br />

for SHARC, 5-47<br />

ROM<br />

memory images as ASCII text files, A-15<br />

memory sections, 7-5<br />

setting splitter options (Blackfin<br />

processors), 2-79<br />

splitter, See splitter<br />

-romsplitter, loader switch for Blackfin,<br />

2-69, 2-71<br />

Rx registers, 2-49, 2-52, 3-13<br />

RXSPI register, 5-8<br />

RXSR register, 5-8<br />

RXx registers, 5-10<br />

S<br />

s1 (Motorola EXORciser) file format, 6-9,<br />

7-6, A-11<br />

s2 (Motorola EXORMAX) file format, 6-9,<br />

7-6, A-11<br />

s3 (Motorola 32-bit) file format, 6-9, 7-6,<br />

A-11<br />

scratchpad memory (Blackfin processors)<br />

ADSP-BF535 processors, 2-14<br />

ADSP-BF561/6 processors, 2-55<br />

SDCTL register, 4-18, 5-20<br />

SDRAM memory (ADSP-2106x/160<br />

processors), 3-17<br />

SDRAM memory (Blackfin processors)<br />

ADSP-BF531/2/3/4/6/7/8/9 processors,<br />

2-35, 2-38, 2-41<br />

ADSP-BF535 processors, 2-6, 2-14,<br />

2-15<br />

ADSP-BF561/6 processors, 2-49, 2-55<br />

SDRDIV register, 4-18, 5-20<br />

second-stage loader<br />

ADSP-BF535 processors, 1-14, 2-6, 2-8,<br />

2-13, 2-14, 2-15<br />

ADSP-BF561/6 processors, 2-49, 2-50<br />

creating from <strong>VisualDSP++</strong>, 2-78<br />

setting options, 2-74, 2-76<br />

source files (ADSP-BF535 processors),<br />

2-78<br />

SENDZ bit, 5-9, 5-11<br />

sequential EPROM boot, 4-22<br />

serial peripheral interface, See SPI<br />

I-14 <strong>VisualDSP++</strong> <strong>4.5</strong> <strong>Loader</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Manual</strong>

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