VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader/Splitter for Blackfin Processors
The loader utility converts the application code (.dxe) into the loadable
file by parsing the code and creating a file that consists of different blocks.
Each block is encapsulated within a 10-byte header, which is illustrated in
Figure 2-17 and detailed in the following section. The headers, in turn,
are read and parsed by the on-chip boot ROM during booting.
The 10-byte header provides all information the on-chip boot ROM
requires—where to boot the block to, how many bytes to boot in, and
what to do with the block.
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/
BF539 Processor in SPI Slave Boot Mode
For SPI slave mode booting, the ADSP-BF531/BF532/BF533/BF534/
BF536/BF537/BF538/BF539 processor is configured as an SPI slave
device, and a host device is used to boot the processor.
� This
boot mode is not supported in ADSP-BF531/BF532/BF533/
silicon revision 0.2 and earlier.
Figure 2-18 shows the pin-to-pin connections needed for SPI slave mode.
The host does not need any knowledge of the loader file stream to boot
the Blackfin processor. It must be configured to send one byte at a time
from the loader file in ASCII format. In the above setup, a PFx signal is the
feedback strobe from the Blackfin processor to the master host device.
This is the signal used by the Blackfin processor to hold off the host during
certain times within the boot process (specifically during init code
execution and zero-fill blocks). When PFx is asserted (high), the master
host device must discontinue sending bytes to the Blackfin processor.
When PFx is de-asserted (low), the master host device resumes sending
bytes from where it left off. Since the PFx pin is not driven by the slave
until the first block has been processed, consider using a resistor to pull
down the feedback strobe.
VisualDSP++ 4.5 Loader and Utilities Manual 2-21