VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Blackfin Processor Booting
In Figure 2-21, The TWI controller outputs on the bus the address of the
I 2 C device to boot from: 0xA0 where the least significant bit indicates the
direction of the transfer. In this case, it is a write (0) in order to write the
first 2 bytes of the internal address from which to start booting (0x00).
Figure 2-21. TWI Master Booting
Figure 2-22 shows the TWI init and zero-fill blocks.
Figure 2-22. TWI Init and Zero-Fill Blocks
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