VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader/Splitter for Blackfin Processors
Refer to Figure 2-29 and Table 2-5 for the flag’s bit descriptions.
Table 2-5. Flag Structure
Bit Field Description
Zero-fill block Indicates that the block is for a buffer filled with zeros. The body of a zero
block is not included within the loader file. When the loader utility parses
through the .dxe file and encounters a large buffer with zeros, it creates a
zero-fill block to reduce .ldr file size and boot time. If this bit is set, there is
no block body in the block.
Ignore block Indicates that the block is not to be booted into memory; skips the block and
moves on to the next one. Currently is not implemented for application code.
Initialization
block
Indicates that the block is to be executed before booting. The initialization
block indicator allows the on-chip boot ROM to execute a number of instructions
before booting the actual application code. When the on-chip boot ROM
detects an init block, it boots the block into internal memory and makes a
CALL to it (initialization code must have an RTS at the end).
This option allows the user to run initialization code (such as SDRAM initialization)
before the full boot sequence proceeds. Figure 2-30 and Figure 2-31
illustrate the process. Initialization code can be included within the .ldr file
by using the -init switch (see “-init filename.dxe” on page 2-67).
See “Initialization Blocks” on page 2-36 for more information.
Processor type Indicates the processor, either ADSP-BF531/BF532/BF538 or
ADSP-BF533/BF534/BF536/BF537/BF539. After booting is complete, the
on-chip boot ROM jumps to 0xFFA0 0000 for the
ADSP-BF533/BF536/BF537/BF539 processor and to 0xFFA0 8000 for the
ADSP-BF531/BF532/BF538 processor.
Last block Indicates that the block is the last block to be booted into memory. After the
last block, the processor jumps to the start of L1 memory for application code
execution. When it jumps to L1 memory for code execution, the processor is
still in supervisor mode and in the lowest priority interrupt (IVG15).
Compressed
block
Indicates that the block contains compressed data. The compressed block can
include a number of blocks compressed together to form a single compressed
block.
Note that the ADSP-BF534/BF536/BF537 processor can have a special
last block if the boot mode is two-wire interface (TWI). The loader utility
saves all the data from 0xFF903F00 to 0xFF903FFF and makes the last block
VisualDSP++ 4.5 Loader and Utilities Manual 2-35