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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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<strong>Loader</strong> for ADSP-2126x/2136x/2137x SHARC Processors<br />

/* ------ Setup loop for self-modifying instruction ------- */<br />

I4=0x80004; /* Point to 0x080004 for self-modifying<br />

code inserted by the loader at 0x80004<br />

in bootstream */<br />

R9=pass R9, R11=R12; /* Clear AZ, copy power-on value<br />

of SYSCTL to R11 */<br />

DO 0x80004 UNTIL EQ; /* Set bottom-of-loop address (loopstack)<br />

to 0x80004 <strong>and</strong> top-of-loop (PC Stack)<br />

to the address of the next<br />

instruction. */<br />

PCSTK=0x80004; /* Change top-of-loop value from the<br />

address of this instruction to<br />

0x80004. */<br />

/* ------------- Setup final DMA parameters --------------- */<br />

R1=0x80000;DM(IISX)=R1; /* Setup DMA to load over ldr */<br />

R2=0x180; DM(CSX)=R2; /* Load internal count */<br />

DM(IMSX)=M6; /* Set to increment internal ptr */<br />

/*----------------- Enable SPI interrupt -------------------*/<br />

bit clr IRPTL SPIHI; /* Clear any pending SPI interr. latch */<br />

bit set IMASK SPIHI; /* Enable SPI receive interrupt */<br />

bit set MODE1 IRPTEN; /* Enable global interrupts */<br />

FLUSH CACHE; /* Remove any kernel instr’s from cache */<br />

/*---------- Begin final DMA to overwrite this code -------- */<br />

ustat1=dm(SPIDMAC);<br />

bit set ustat1 SPIDEN;<br />

dm(SPIDMAC)=ustat1; /* Begin final DMA transfer */<br />

/*------------ Initiate self-modifying sequence ----------- */<br />

JUMP 0x80004 (DB); /* Causes 0x80004 to be the return<br />

<strong>VisualDSP++</strong> <strong>4.5</strong> <strong>Loader</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Manual</strong> 5-31

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