VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

ADSP-2126x/2136x/2137x Processor Booting
ADSP-2126x/2136x/2137x Processor
Booting
ADSP-2126x, ADSP-2136x, and ADSP-2137x processors can be booted
from an external PROM memory device via the parallel port (PROM
mode) or via the serial peripheral interface (SPI slave, SPI flash, or SPI
master mode). In no-boot mode, the processor is booted from the internal
ROM (only available on some processors).
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In parallel port boot mode, the loader output file (.ldr) is stored in
an 8-bit wide parallel PROM device and fetched by the processor.
the ADSP-2126x/2136x/2137x processors, whether supporting
multiprocessing or not, there is no ID lookup table between the
kernel and the rest of the application.
In SPI slave boot mode, the loader file is transmitted to the processor
by a host processor configured as an SPI master.
There are three cases for the SPI master boot mode: SPI master
(no address), SPI PROM (16-bit address), and SPI flash (24-bit
address). The difference between the these modes is the way the
slave device sends the first word of the .ldr file. In SPI PROM and
SPI flash boot modes, the .ldr file is stored in a passive memory
device and fetched by the processor. In SPI master, the .ldr file is
transmitted to the processor by a host processor configured as an
SPI slave.
In no-boot mode, the processor fetches and executes instructions
directly from the internal memory, bypassing the boot kernel
entirely. The loader utility does not produce a file supporting the
no-boot mode.
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