VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Blackfin Processor Loader Guide
Figure 2-41. ROM Splitter Options Page for Blackfin Processors
executing instructions from address 0x2000 0000 in the asynchronous
memory bank 0. The processor assumes 16-bit memory with valid instructions
at that location.
To create a proper .ldr file that can be burned into either a parallel flash
or EPROM device, you must modify the standard LDF file in order for
the reset vector to be located accordingly. The following code fragments
(Listing 2-3 and Listing 2-4) illustrate the required modifications in case
of an ADSP-BF533 processor.
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