VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader for ADSP-2126x/2136x/2137x SHARC Processors
Booting From an SPI Host Processor
Typically, host processors in SPI slave mode transmit data on every SPICLK
cycle. This means that the first four bytes that are sent by the host processor
are part of the first 32-bit word that is thrown away by the processor
(see Figure 5-1). Therefore, it is necessary for the loader to pad an extra
four bytes to the beginning of the boot stream when programming the
host; for example, the first byte of the kernel is the fifth byte of the boot
stream. VisualDSP++ automatically handles this in the loader file generation
process.
Internal Boot Mode
In internal boot mode, upon reset, the processor starts executing the application
stored in the internal boot kernel.
To facilitate internal booting, the -nokernel command-line switch commands
the loader utility:
To omit a boot kernel.
The -nokernel switch denotes that a running on the processor
(already booted) subroutine imports the .ldr file. The loader utility
does not insert a boot kernel into the .ldr file—a similar
subroutine is present already on the processor. Instead, the loader
file begins with the first header of the first block of the boot
stream.
To omit any interrupt vector table (IVT) handling.
In internal boot mode, the boot stream is not imported by a boot
kernel executing from within the IVT; no self-modifying
FINAL_INIT code (which overwrites itself with the IVT) is needed.
Thus, the loader utility does not give any special handling to the
256 instructions located in the IVT (0x80000–0x800FF for
ADSP-2126x processors and 0x90000–0x900FF for ADSP-2136x
processors). Instead, the IVT code or data are handled like any
other range of memory.
VisualDSP++ 4.5 Loader and Utilities Manual 5-17