VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Blackfin Processor Booting
Blackfin Processor Booting
A Blackfin processor can be booted from an 8- or 16-bit flash/PROM
memory or from an 8-,16-, or 24-bit addressable SPI memory. (The
ADSP-BF561/BF566 processors does not support 24-bit addressable SPI
memory boot.) There is also a no-boot option (bypass mode) in which
execution occurs from a 16-bit external memory.
At power-up, after a reset, the processor transitions into a boot mode
sequence configured by the BMODE pins (Table 2-1). The BMODE pins are
dedicated mode-control pins; that is, no other functions are performed by
these pins. The pins can be read through bits in the system reset configuration
register SYSCR (Figure 2-2).
� Refer
to the processor’s datasheet and hardware reference for more
information on system configuration, peripherals, registers, and
operating modes.
ADSP-BF535 Processor Booting
Upon reset, an ADSP-BF535 processor jumps to an external 16-bit memory
for execution (if BMODE = 000) or to the on-chip boot ROM (if
BMODE = 001, 010, or 011). Table 2-1 summarizes boot modes and code
execution start addresses for ADSP-BF535 processors.
Table 2-1. ADSP-BF535 Processor Boot Mode Selections
Boot Source BMODE[2:0] Execution Start Address
Execute from a 16-bit external memory (async
bank 0); no-boot mode (bypass on-chip boot
ROM); see on page 2-79.
000 0x2000 0000
Boot from an 8-bit/16-bit flash memory 001 0xF000 0000 1
Boot from an 8-bit address SPI0 serial EEPROM 010 0xF000 0000 1
2-2 VisualDSP++ 4.5 Loader and Utilities Manual