VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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Blackfin Processor Booting A description of each boot mode is as follows. “ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/ BF539 Processor On-Chip Boot ROM” on page 2-19 “ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/ BF539 Processor in SPI Slave Boot Mode” on page 2-21 “ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/ BF539Processor in SPI Master Boot Mode” on page 2-23 “ADSP-BF534/BF536/BF537 TWI Master Boot Mode (BMODE = 101)” on page 2-27 “ADSP-BF534/BF536/BF537 TWI Slave Boot Mode (BMODE = 110)” on page 2-29 “ADSP-BF534/BF536/BF537 UART Slave Mode Boot via Master Host (BMODE = 111)” on page 2-30 “ADSP-BF535 and ADSP-BF531/BF532/BF533/BF534/ BF536/BF537/BF538/BF539 Processor No-Boot Mode” on page 2-79 2-18 VisualDSP++ 4.5 Loader and Utilities Manual
Loader/Splitter for Blackfin Processors ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/ BF539 Processor On-Chip Boot ROM The on-chip boot ROM for ADSP-BF531/BF532/BF533/BF534/ BF536/BF537/BF538/BF539 processors does the following. 1. Sets up supervisor mode by exiting the RESET interrupt service routine and jumping into the lowest priority interrupt (IVG15). Note that the on-chip boot ROM of the ADSP-BF534/BF536 and ADSP-BF537 processors executes at the Reset priority level, does not degrade to the lowest priority interrupt. 2. Checks whether the RESET was a software reset and, if so, whether to skip the entire sequence and jump to the start of L1 memory (0xFFA0 0000 for ADSP-BF533/BF534/BF536/BF537/BF539 processors; 0xFFA0 8000 for ADSP-BF531/BF532/BF538) for execution. The on-chip boot ROM does this by checking the NOBOOT bit (bit 4) of the system reset configuration register (SYSCR). See Figure 2-16. If bit 4 is not set, the on-chip boot ROM performs the full boot sequence. If bit 4 is set, the on-chip boot ROM bypasses the full boot sequence and jumps to the start of L1 memory. X - state is initialized from mode pins during hardware reset 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0xFFC0 0104 0 0 0 0 0 0 0 0 0 0 0 0 0 X X X Reset = dependent on pin values NOBOOT (No Boot on Software Reset) 0 - Use BMODE to determine boot source 1 - Start executing from the the EVT1 vector. EVT1 defaults to 0xFFA00000, except the ADSP-BF531/BF532 and ADSP-BF538 processors, where it defaults to 0xFFA08000. Figure 2-16. System Reset Configuration Register BMODE[2:0] (Boot Mode) - RO The BMODE bit field represents the BMODE pin settings. Various processors populate two, three or four bits according to the number of featured BMODE pins (see Table 2-2 and Table 2-3. VisualDSP++ 4.5 Loader and Utilities Manual 2-19
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
Page 5 and 6: CONTENTS Loader Files Without a Sec
Page 7 and 8: CONTENTS ADSP-BF535 and ADSP-BF531/
Page 9 and 10: Contents File Extensions ..........
Page 11 and 12: Contents Boot Type Selection ......
Page 13 and 14: PREFACE Thank you for purchasing Vi
Page 15 and 16: Technical or Customer Support Prefa
Page 17 and 18: ADSP-21367 ADSP-21368 ADSP21369 ADS
Page 19 and 20: Preface VisualDSP++ 4.5 C/C++ Compi
Page 21 and 22: VisualDSP++ Documentation Set Prefa
Page 23 and 24: 1 INTRODUCTION The majority of this
Page 25 and 26: Loader Command Line Introduction If
Page 27 and 28: Initialization Code Introduction In
Page 29 and 30: A brief description of each phase f
Page 31 and 32: Introduction Download the loadable
Page 33 and 34: Introduction You can run the loader
Page 35 and 36: PROM Boot Mode Introduction After r
Page 37 and 38: Boot Streams Introduction The loade
Page 39 and 40: 2 LOADER/SPLITTER FOR BLACKFIN PROC
Page 41 and 42: Loader/Splitter for Blackfin Proces
Page 43 and 44: System Reset Configuration Register
Page 49 and 50: D7 OUTPUT .LDR FILE 4-BYTE HEADER F
Page 53 and 54: Second-Stage Loader Restrictions Lo
Page 55: Loader/Splitter for Blackfin Proces
Page 63 and 64: SPI Memory Detection Routine Loader
Page 77 and 78: P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
Page 79 and 80: � Booting � SDRAM ADSP-BF536 pr
Page 85 and 86: 1-0-Byte Block Header Block Data Lo
Page 93 and 94: � The Core B Loader/Splitter for
Page 95 and 96: INITIALIZATION CODE (KERNEL WITH DE
Page 99 and 100: FLASH MEMORY INIT CODE HEADER INIT
Page 101 and 102: where: � Command-line File Search
Page 103 and 104: Blackfin Loader Command-Line Switch
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Loader/Splitter for Blackfin Proces
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Using Base Loader Loader/Splitter f
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Table 2-11. Base Load Page Settings
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Using Second-Stage Loader Loader/Sp
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3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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Boot Mode Selection Loader for ADSP
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File Searches Loader for ADSP-2106x
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-si-revision #|none|any Loader for
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4 LOADER FOR ADSP-21161 SHARC PROCE
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Loader for ADSP-21161 SHARC Process
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ADSP-21161 Processor Boot Streams L
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To Modify a Boot Kernel Source File
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Processor ID Numbers Loader for ADS
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File Searches Loader for ADSP-21161
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5 LOADER FOR ADSP-2126X/2136X/2137X
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Loader for ADSP-2126x/2136x/2137x S
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File Searches Loader for ADSP-2126x
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6 LOADER FOR TIGERSHARC PROCESSORS
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� EE-174: Loader for TigerSHARC P
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Boot Kernel Modification Loader for
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Loader for TigerSHARC Processors el
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TigerSHARC Command-Line Switches Lo
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Loader for TigerSHARC Processors Ta
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7 SPLITTER FOR SHARC AND TIGERSHARC
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� Most Splitter for SHARC and Tig
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Splitter for SHARC and TigerSHARC P
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A FILE FORMATS VisualDSP++ developm
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Assembly Source Files File Formats
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Build Files File Formats Build file
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Memory Map Files File Formats The l
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Table A-4. End-of-File Record Examp
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This example shows how to include t
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Table A-7. S1 Termination Record Ex
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File Formats A block of data record
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Table A-9. SPORT Data File Example
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B UTILITIES The VisualDSP++ develop
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elf2flt - ELF to BFLT File Converte
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Table B-3. BFLT File Dumper Command
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I INDEX Numerics -64 splitter switc
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BMS pins ADSP-2106x/160 processors,
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data initialization files (.dat), A
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external memory (SHARC processors)
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initialization blocks (Blackfin pro
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loader file formats (ADSP-BF535 pro
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P -p # loader switch for Blackfin,
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shared memory Blackfin processors,
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V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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