VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

INDEX
-bprom|host|link, loader switch for
TigerSHARC, 6-9, 6-10
-bprom|host|link|JTAG, loader switch for
ADSP-2106x/160 processors, 3-28
-bprom|host|link|spi, loader switch for
ADSP-21161 processors, 4-28
-bprom|spislave|spiflash|spimaster|spiprom
, loader switch for
ADSP-2126x/36x/37x processors,
5-16, 5-44
BSEL pin, 3-6
BSO bit, 3-10
build file formats, list of, A-5
BUSLCK bit, 3-13, 3-14
bypass mode, See no-boot mode
byte-stacked format files (.stk), 7-4, 7-6,
7-7, A-14
C
-caddress, loader switch for
ADSP-2106x/160 processors, 3-28
C and C++ source files, 1-7, A-2
CEP0 register, 3-8, 4-8, 4-9, 4-11, 4-12
CLB0 register, 4-13, 4-14
CLKPL bit, 5-9, 5-11
COFF to ELF file conversion, A-6
command line
loader for SHARC processors, 3-26,
4-25, 5-42
loader for TigerSHARC processors, 6-6
loader/splitter for Blackfin processors,
2-62
splitter, 7-2, 7-5
compilation, introduction to, 1-7
compressed block headers
Blackfin processors, 2-35, 2-57
SHARC processors, 5-37
compressed streams
Blackfin processors, 2-56, 2-60
SHARC processors, 5-36, 5-39
-compression
loader switch for Blackfin, 2-56, 2-65
loader switch for SHARC, 5-36, 5-39,
5-44
Compression (Load) page (Blackfin
processors), 2-76
-compressionOverlay, loader switch for
SHARC, 5-36, 5-39, 5-44
compression support
ADSP-2126x/36x/37x processors, 5-35
ADSP-BF531/2/3/4/6/7/8/9 processors,
2-55, 2-76
compression window, 2-58, 2-61, 5-38,
5-41
-compressWS
loader switch for Blackfin, 2-61, 2-66
loader switch for SHARC, 5-41, 5-44
conversion utilities, B-2
count headers (Blackfin processors)
ADSP-BF531/2/3/4/6/7/8/9 processors,
2-51
ADSP-BF561/6 processors, 2-45, 2-49,
2-51
CPEP0 register, 4-8, 4-11
CPHA bit, 2-24
CPHASE bit, 5-9, 5-11
CPLB0 register, 4-14
CPOL bit, 2-24
CS pin, 3-13, 4-12, 5-8
CSPI register, 5-10, 5-11
CSRX register, 4-16
customer support, -xv
Cx register, 3-8, 3-9, 3-11, 3-15
D
D23-16 bits, 3-10
D39-32 bits, 3-10
D7-0 bits, 3-10
I-4 VisualDSP++ 4.5 Loader and Utilities Manual