VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Blackfin Processor Booting
A block header has three words: 4-byte clock start address, 4-byte block
byte count, and 2-byte flag word.
The ADSP-BF535 block flag word’s bits are illustrated in Figure 2-15.
ADSP-BF535 Processor Memory Ranges
Second-stage loaders are available for ADSP-BF535 processors in
VisualDSP++ 3.0 and higher. They allow booting to:
� SDRAM
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Bit 15: 1 = Last Block, 0 = Not Last Block Bit 0: 1 = Zero-Fill, 0 = No Zero-Fill
Figure 2-15. Block Flag Word Bit Assignments
L2 memory (0xF000 0000)
L1 memory
� Data bank A SRAM (0xFF80 0000)
� Data bank B SRAM (0xFF90 0000)
� Instruction SRAM (0xFFA0 0000)
� Scratchpad SRAM (0xFFB0 0000)
SDRAM
� Bank 0 (0x0000 0000)
� Bank 1 (0x0800 0000)
� Bank 2 (0x1000 0000)
� Bank 3 (0x1800 0000)
must be initialized by user code before any instructions or
data are loaded into it.
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