VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader for ADSP-21161 SHARC Processors
ADSP-21161 Processor Boot Modes
ADSP-21161 processors support these boot modes: EPROM, host, link,
and SPI. The following section describe each of the modes.
� For
“EPROM Boot Mode” on page 4-5
“Host Boot Mode” on page 4-9
“Link Port Boot Mode” on page 4-12
“SPI Port Boot Mode” on page 4-14
“No-Boot Mode” on page 4-16
multiprocessor booting, refer to “ADSP-21161 Multi-Application
(Multi-DXE) Management” on page 4-21.
EPROM Boot Mode
EPROM boot via the external port is selected when the EBOOT input is
high and the LBOOT input is low. These settings cause the BMS pin to
become an output, serving as chip select for the EPROM.
The DMAC10 control register is initialized for booting packing boot data
into 48-bit instructions. EPROM boot mode uses channel 10 of the IO
processor’s DMA controller to transfer the instructions to internal memory.
For EPROM booting, the processor reads data from an 8-bit external
EPROM.
After the boot process loads 256 words into memory locations 0x40000
through 0x400FF, the processor begins to execute instructions. Because
most processor programs require more than 256 words of instructions and
initialization data, the 256 words typically serve as a loading routine for
the application. VisualDSP++ includes loading routines (boot kernels)
that can load entire programs; see “ADSP-21161 Processor Boot Kernels”
on page 4-16 for more information.
VisualDSP++ 4.5 Loader and Utilities Manual 4-5