VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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Blackfin Processor Booting Table 2-4. ADSP-BF531/BF532/BF533 Block Header Structure (Cont’d) Bit Field Description Flag 2-byte flag containing information about the block; the following text describes the flag structure. BOOT STREAM OF THE 1st EXECUTABLE (.DXE 1) BOOT STREAM OF THE 2nd EXECUTABLE (.DXE 2) BLOCK HEADER OF .DXE 1 COUNT .DXE 1 BYTE COUNT BLOCK 1 HEADER BLOCK 2 BODY BLOCK 2 HEADER BLOCK 2 BODY ...... ...... HEADER OF .DXE 2 COUNT .DXE 2 BYTE COUNT ...... ...... 10-BYTE HEADER 4-BYTE ADDRESS 4-BYTE COUNT 2-BYTE FLAG SEE FLAG INFORMATION Figure 2-28. ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/ BF539 Processors: Boot Stream Structure 2-34 VisualDSP++ 4.5 Loader and Utilities Manual
Loader/Splitter for Blackfin Processors Refer to Figure 2-29 and Table 2-5 for the flag’s bit descriptions. Table 2-5. Flag Structure Bit Field Description Zero-fill block Indicates that the block is for a buffer filled with zeros. The body of a zero block is not included within the loader file. When the loader utility parses through the .dxe file and encounters a large buffer with zeros, it creates a zero-fill block to reduce .ldr file size and boot time. If this bit is set, there is no block body in the block. Ignore block Indicates that the block is not to be booted into memory; skips the block and moves on to the next one. Currently is not implemented for application code. Initialization block Indicates that the block is to be executed before booting. The initialization block indicator allows the on-chip boot ROM to execute a number of instructions before booting the actual application code. When the on-chip boot ROM detects an init block, it boots the block into internal memory and makes a CALL to it (initialization code must have an RTS at the end). This option allows the user to run initialization code (such as SDRAM initialization) before the full boot sequence proceeds. Figure 2-30 and Figure 2-31 illustrate the process. Initialization code can be included within the .ldr file by using the -init switch (see “-init filename.dxe” on page 2-67). See “Initialization Blocks” on page 2-36 for more information. Processor type Indicates the processor, either ADSP-BF531/BF532/BF538 or ADSP-BF533/BF534/BF536/BF537/BF539. After booting is complete, the on-chip boot ROM jumps to 0xFFA0 0000 for the ADSP-BF533/BF536/BF537/BF539 processor and to 0xFFA0 8000 for the ADSP-BF531/BF532/BF538 processor. Last block Indicates that the block is the last block to be booted into memory. After the last block, the processor jumps to the start of L1 memory for application code execution. When it jumps to L1 memory for code execution, the processor is still in supervisor mode and in the lowest priority interrupt (IVG15). Compressed block Indicates that the block contains compressed data. The compressed block can include a number of blocks compressed together to form a single compressed block. Note that the ADSP-BF534/BF536/BF537 processor can have a special last block if the boot mode is two-wire interface (TWI). The loader utility saves all the data from 0xFF903F00 to 0xFF903FFF and makes the last block VisualDSP++ 4.5 Loader and Utilities Manual 2-35
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
Page 21 and 22: VisualDSP++ Documentation Set Prefa
Page 23 and 24: 1 INTRODUCTION The majority of this
Page 25 and 26: Loader Command Line Introduction If
Page 27 and 28: Initialization Code Introduction In
Page 29 and 30: A brief description of each phase f
Page 31 and 32: Introduction Download the loadable
Page 33 and 34: Introduction You can run the loader
Page 35 and 36: PROM Boot Mode Introduction After r
Page 37 and 38: Boot Streams Introduction The loade
Page 39 and 40: 2 LOADER/SPLITTER FOR BLACKFIN PROC
Page 41 and 42: Loader/Splitter for Blackfin Proces
Page 43 and 44: System Reset Configuration Register
Page 49 and 50: D7 OUTPUT .LDR FILE 4-BYTE HEADER F
Page 53 and 54: Second-Stage Loader Restrictions Lo
Page 63 and 64: SPI Memory Detection Routine Loader
Page 71: Loader/Splitter for Blackfin Proces
Page 77 and 78: P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
Page 79 and 80: � Booting � SDRAM ADSP-BF536 pr
Page 85 and 86: 1-0-Byte Block Header Block Data Lo
Page 93 and 94: � The Core B Loader/Splitter for
Page 95 and 96: INITIALIZATION CODE (KERNEL WITH DE
Page 99 and 100: FLASH MEMORY INIT CODE HEADER INIT
Page 101 and 102: where: � Command-line File Search
Page 103 and 104: Blackfin Loader Command-Line Switch
Page 111 and 112: Using Base Loader Loader/Splitter f
Page 113 and 114: Table 2-11. Base Load Page Settings
Page 115 and 116: Using Second-Stage Loader Loader/Sp
Page 121 and 122: 3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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Boot Mode Selection Loader for ADSP
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File Searches Loader for ADSP-2106x
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-si-revision #|none|any Loader for
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4 LOADER FOR ADSP-21161 SHARC PROCE
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Loader for ADSP-21161 SHARC Process
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ADSP-21161 Processor Boot Streams L
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To Modify a Boot Kernel Source File
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Processor ID Numbers Loader for ADS
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File Searches Loader for ADSP-21161
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5 LOADER FOR ADSP-2126X/2136X/2137X
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Loader for ADSP-2126x/2136x/2137x S
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File Searches Loader for ADSP-2126x
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6 LOADER FOR TIGERSHARC PROCESSORS
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� EE-174: Loader for TigerSHARC P
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Boot Kernel Modification Loader for
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Loader for TigerSHARC Processors el
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TigerSHARC Command-Line Switches Lo
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Loader for TigerSHARC Processors Ta
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7 SPLITTER FOR SHARC AND TIGERSHARC
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� Most Splitter for SHARC and Tig
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Splitter for SHARC and TigerSHARC P
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A FILE FORMATS VisualDSP++ developm
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Assembly Source Files File Formats
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Build Files File Formats Build file
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Memory Map Files File Formats The l
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Table A-4. End-of-File Record Examp
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This example shows how to include t
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Table A-7. S1 Termination Record Ex
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File Formats A block of data record
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Table A-9. SPORT Data File Example
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B UTILITIES The VisualDSP++ develop
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elf2flt - ELF to BFLT File Converte
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Table B-3. BFLT File Dumper Command
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I INDEX Numerics -64 splitter switc
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BMS pins ADSP-2106x/160 processors,
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data initialization files (.dat), A
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external memory (SHARC processors)
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initialization blocks (Blackfin pro
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loader file formats (ADSP-BF535 pro
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P -p # loader switch for Blackfin,
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shared memory Blackfin processors,
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V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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