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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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<strong>Loader</strong> for ADSP-2126x/2136x/2137x SHARC Processors<br />

ADSP-2126x/2136x/2137x Processor Boot Streams<br />

The loader utility generates <strong>and</strong> inserts a header at the beginning of a<br />

block of contiguous data <strong>and</strong> instructions in the loader file. The kernel<br />

uses headers to properly place blocks into processor memory. The architecture<br />

of the header follows the convention used by other SHARC<br />

processors.<br />

For all of the ADSP-2126x/2136x/2137x processor boot types, the structures<br />

of block header are the same. The header consists of three 32-bit<br />

words: the block tag, word count, <strong>and</strong> destination address. The order of<br />

these words is as follows.<br />

0x000000TT First word. Tag of the data block (T).<br />

0x0000CCCC Second word. Data word length or data word count (C) of the data block.<br />

0xAAAAAAAA Third word. Start address (A) of the data block.<br />

ADSP-2126x/2136x/2137x Processor Block Tags<br />

Table 5-12 details the ADSP-2126x/2136x/2137x processor block tags.<br />

Table 5-12. ADSP-2126x/2136x/2137x Processor Block Tags<br />

Tag Count 1 Address Padding<br />

0x0<br />

FINAL_INIT<br />

0x1<br />

ZERO_LDATA<br />

0x2<br />

ZERO_L48 2<br />

0x3<br />

INIT_L16<br />

Number of 16-, 32-,<br />

or 64-bit words<br />

Number of 48-bit<br />

words<br />

Number of 16-bit<br />

words<br />

Logical short, normal,<br />

or long word address<br />

Logical normal word<br />

address<br />

Logical short word<br />

address<br />

None<br />

None<br />

None<br />

If count is odd, pad with<br />

16-bit zero word (See<br />

“INIT_L16 Blocks” on<br />

page 5-27 for details.)<br />

<strong>VisualDSP++</strong> <strong>4.5</strong> <strong>Loader</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Manual</strong> 5-23

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