VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

System Reset Configuration Register (SYSCR)
X - state is initialized from mode pins during hardware reset
Loader/Splitter for Blackfin Processors
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 X X X 0 Reset = dependent on pin values
No Boot on Software Reset
0 - Use BMODE to determine
boot source.
1 - Start executing from the
beginning of on-chip L2 memory
(or the beginning of ASYNC bank 0
when BMODE[2:0] = b#000).
Figure 2-2. ADSP-BF535 Processors: SYSCR Register
BMODE 2-0 - RO
000 - Bypass boot ROM,
execute from 16-bit-wide
external memory.
001 - Use boot ROM to load
from 8-bit/16-bit flash.
010 - Use boot ROM to configure
and load boot code from
SPI0 serial ROM
(8-bit address range).
011 - Use boot ROM to configure
and load boot code from
SPI0 serial ROM
(16-bit address range).
100-111 - Reserved
3. Finally, if bit 4 of the SYSCR register is not set, performs the full
boot sequence. The full boot sequence includes:
� Checking the boot source (either flash/PROM or SPI memory)
by reading BMODE2–0 from the SYSCR register.
� Reading the first four bytes from location 0x0 of the external
memory device. These four bytes contain the byte
count (N), which specifies the number of bytes to boot in.
� Booting in N bytes into internal L2 memory starting at location
0xF000 0000.
� Jumping to the start of L2 memory for execution.
The on-chip boot ROM boots in N bytes from the external memory. These
N bytes can define the size of the actual application code or a second-stage
loader that boots in the application code.
VisualDSP++ 4.5 Loader and Utilities Manual 2-5