VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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ADSP-2106x/21160 Processor Booting No-Boot Mode No-boot mode causes the processor to start fetching and executing instructions at address 0x400004 (ADSP-2106x), 0x20004 (ADSP-21065L), and 0x800004 (ADSP-21160) in external memory space. All DMA control and parameter registers are set to their default initialization values. The loader utility is not intended to support no-boot mode. ADSP-2106x/21160 Boot Kernels The boot-loading process starts with a transfer of the boot kernel program into the processor memory. The boot kernel sets up the processor and loads boot data. After the boot kernel finishes initializing the rest of the system, the boot kernel loads boot data over itself with a final DMA transfer. Boot kernels are loaded at reset into program segment seg_ldr, which is defined in 06x_ldr.ldf for ADSP-2106x processors, 065L_ldr.ldf for ADSP-21065L processors, and in 160_ldr.ldf for ADSP-21160 processors. The files are stored in the …\21k\ldr (ADSP-2106x processors) and …\211xx\ldr (ADSP-21160 processors) VisualDSP++ installation directories. The default boot kernel files shipped with VisualDSP++ are listed in Table 3-11. Table 3-11. ADSP-2106x/21160 Default Boot Kernel Files Processor PROM Booting Link Booting Host Booting ADSP-21060 060_prom.asm 060_link.asm 060_host.asm ADSP-21065L 065L_prom.asm – 065L_host.asm ADSP-21160 160_prom.asm 160_link.asm 160_host.asm 3-16 VisualDSP++ 4.5 Loader and Utilities Manual
Loader for ADSP-2106x/21160 SHARC Processors Once the boot kernel has been loaded successfully into the processor, the kernel follows the following sequence: 1. Each boot kernel begins with general initializations for the DAG registers, appropriate interrupts, processor ID information, and various SDRAM or WAIT state initializations. 2. Once the boot kernel has finished the task of initializing the processor, the kernel initializes processor memory, both internal and external, with user application code. ADSP-2106x/21160 Processor Boot Steams The structure of a loader file enables the boot kernel to load code and data, block by block. In the loader file, each block of code or data is preceded by a block header, which describes the block —length, placement, and data or instruction type. After the block header, the loader utility outputs the block body, which includes the actual data or instructions for placement in the processor memory. The loader utility, however, does not output a block body if the actual data or instructions are all zeros in value. This type of block called a zero block. Table 3-12 describes the block header and block body formats. Table 3-12. Boot Block Format Block header Block body (if not a zero block) First word Bits 16–47 are not used. Bits 0–15 define the type of data block (tag). Second word Bits 16–47 are the start address of the block. Bits 0–15 are the word count for the block. Word 1 (48 bits) Word 2 (48 bits) The loader utility identifies the data type in the block header with a 16-bit tag that precedes the block. Each type of initialization has a unique tag number. The tag numbers and block types are shown in Table 3-13. VisualDSP++ 4.5 Loader and Utilities Manual 3-17
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
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VisualDSP++ Documentation Set Prefa
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1 INTRODUCTION The majority of this
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Loader Command Line Introduction If
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Initialization Code Introduction In
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A brief description of each phase f
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Introduction Download the loadable
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Introduction You can run the loader
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PROM Boot Mode Introduction After r
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Boot Streams Introduction The loade
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2 LOADER/SPLITTER FOR BLACKFIN PROC
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Loader/Splitter for Blackfin Proces
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System Reset Configuration Register
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D7 OUTPUT .LDR FILE 4-BYTE HEADER F
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Second-Stage Loader Restrictions Lo
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SPI Memory Detection Routine Loader
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P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
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� Booting � SDRAM ADSP-BF536 pr
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Page 85 and 86: 1-0-Byte Block Header Block Data Lo
Page 87 and 88: Loader/Splitter for Blackfin Proces
Page 93 and 94: � The Core B Loader/Splitter for
Page 95 and 96: INITIALIZATION CODE (KERNEL WITH DE
Page 99 and 100: FLASH MEMORY INIT CODE HEADER INIT
Page 101 and 102: where: � Command-line File Search
Page 103 and 104: Blackfin Loader Command-Line Switch
Page 111 and 112: Using Base Loader Loader/Splitter f
Page 113 and 114: Table 2-11. Base Load Page Settings
Page 115 and 116: Using Second-Stage Loader Loader/Sp
Page 121 and 122: 3 LOADER FOR ADSP-2106X/21160 SHARC
Page 123 and 124: Loader for ADSP-2106x/21160 SHARC P
Page 125 and 126: Boot Mode Selection Loader for ADSP
Page 135: Loader for ADSP-2106x/21160 SHARC P
Page 147 and 148: File Searches Loader for ADSP-2106x
Page 151 and 152: -si-revision #|none|any Loader for
Page 153 and 154: 4 LOADER FOR ADSP-21161 SHARC PROCE
Page 155 and 156: Loader for ADSP-21161 SHARC Process
Page 169 and 170: ADSP-21161 Processor Boot Streams L
Page 171 and 172: To Modify a Boot Kernel Source File
Page 175 and 176: Processor ID Numbers Loader for ADS
Page 179 and 180: File Searches Loader for ADSP-21161
Page 185 and 186: 5 LOADER FOR ADSP-2126X/2136X/2137X
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Loader for ADSP-2126x/2136x/2137x S
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File Searches Loader for ADSP-2126x
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6 LOADER FOR TIGERSHARC PROCESSORS
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� EE-174: Loader for TigerSHARC P
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Boot Kernel Modification Loader for
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Loader for TigerSHARC Processors el
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TigerSHARC Command-Line Switches Lo
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Loader for TigerSHARC Processors Ta
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7 SPLITTER FOR SHARC AND TIGERSHARC
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� Most Splitter for SHARC and Tig
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Splitter for SHARC and TigerSHARC P
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A FILE FORMATS VisualDSP++ developm
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Assembly Source Files File Formats
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Build Files File Formats Build file
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Memory Map Files File Formats The l
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Table A-4. End-of-File Record Examp
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This example shows how to include t
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Table A-7. S1 Termination Record Ex
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File Formats A block of data record
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Table A-9. SPORT Data File Example
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B UTILITIES The VisualDSP++ develop
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elf2flt - ELF to BFLT File Converte
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Table B-3. BFLT File Dumper Command
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I INDEX Numerics -64 splitter switc
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BMS pins ADSP-2106x/160 processors,
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data initialization files (.dat), A
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external memory (SHARC processors)
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initialization blocks (Blackfin pro
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loader file formats (ADSP-BF535 pro
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P -p # loader switch for Blackfin,
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shared memory Blackfin processors,
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V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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