VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader for ADSP-2126x/2136x/2137x SHARC Processors
FINAL_INIT Blocks
The final 256-instructions of the .ldr file contain the instructions for the
IVT. The instructions are initialized by a special self-modifying subroutine
in the boot kernel (see Listing 5-3). To support the self-modifying
code, the loader utility modifies the FINAL_INIT block as follows:
1. Places a multi-function instruction at the fifth instruction of the
block:
The loader utility places the instruction R0=R0-R0, DM(I4,M5)=R9,
PM(I12,M13)=R11; at 0x80004 for ADSP-2126x processors or
0x90004 for ADSP-2136x/2137x processors. The instruction overwrites
whatever instruction is at that address. The opcode for this
instruction is 0x39732D802000.
2. Places an RTI instruction in the IVT:
The loader utility places an RTI instruction
(opcode 0x0B3E00000000) at the first address in the IVT entry associated
with the boot-source, either PROM or SPI. Unlike the
multifunction instruction placed at 0x80004 (for ADSP-2126x processors)
or 0x90004 (for ADSP-2136x/2137x processors), which
overwrites the data, the loader utility preserves the user-specified
instruction which the RTI replaces. This instruction is stored in
the header for FINAL_INIT as shown in Listing 5-2.
For PROM boot mode, the RTI is placed at address
0x80050 for ADSP-2126x and at 0x90050 for
ADSP-2136x/2137x processors.
For all SPI boot modes, the RTI is placed at address
0x80030 for ADSP-2126x and at 0x90036 for
ADSP-2136x/2137x processors (high priority SPI
interrupt).
3. Saves an IVT instruction in the FINAL_INIT block header.
The count and address of a FINAL_INIT block are constant; to avoid
any redundancy, the count and address are not placed into the
VisualDSP++ 4.5 Loader and Utilities Manual 5-29