VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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INDEX kernels (Blackfin processors) See also second-stage loader compression/decompression, 2-57, 2-61 graphical user interface, 2-77 omitting in output, 2-69 specifying boot mode, 2-67, 2-74 specifying file format, 2-67 specifying file width, 2-68, 2-74 specifying hex address, 2-68 specifying hold time, 2-75 specifying kernel and app files, 2-78 specifying user kernel, 2-68, 2-75 kernels (TigerSHARC processors) modifying, 6-5 omitting in output, 6-4, 6-10 source files, 6-4 specifying user kernel, 6-10 -kf hex|ascii|binary|include, loader switch for Blackfin, 2-67 .knl (kernel code) files, 2-64 -kp #, loader switch for Blackfin, 2-68, 2-70 -kWidth #, loader switch for Blackfin, 2-68 L L1 memory (Blackfin processors) ADSP-BF531/2/3/4/6/7/8/9 processors, 2-19, 2-35, 2-40 ADSP-BF535 processors, 2-6, 2-14, 2-15 ADSP-BF561/6 processors, 2-43, 2-54 L2 memory (Blackfin processors) ADSP-BF535 processors, 2-4, 2-5, 2-6, 2-14, 2-15 ADSP-BF561/6 processors, 2-50, 2-55 last blocks (Blackfin processors) ADSP-BF531/2/3/4/6/7/8/9 processors, 2-35, 2-36 ADSP-BF561/6 processors, 2-45 LBOOT pins ADSP-2106x/161 processors, 3-5, 3-7, 3-11 ADSP-21161 processors, 4-4, 4-5, 4-6, 4-9, 4-13, 4-15 LCOM register, 3-15 LCTL register, 3-15, 3-18, 4-13 .ldr (loader output) files ASCII format, 2-21, A-4, A-15 binary format, A-11 hex-32 format, A-7 include format files, A-10 naming, 2-69, 6-10 specifying host bus width, 4-29, 5-45 least significant bit first (LSB) format, 5-12 library files (.dlb), A-6 link buffers, 3-15, 4-12, 4-13 linker command-line files (.txt), A-4 description file (LDF) See .ldf files memory map files (.map), A-7 output files (.dxe, .sm, .ovl), 1-7, A-6 linking, introduction to, 1-7 link port boot mode (SHARC processors) ADSP-2106x/160 processors, 3-2, 3-5, 3-15 ADSP-21161 processors, 4-2, 4-4, 4-12 link port boot mode (TigerSHARC processors), 6-3, 6-9 loadable files, See boot-loadable files loader operations, 1-10 output file formats, 1-10, 1-15, A-7, A-10, A-11 setting options, 2-73, 3-32, 4-32, 5-49, 6-12, 7-9 I-10 VisualDSP++ 4.5 Loader and Utilities Manual
loader file formats (ADSP-BF535 processors) PROM/flash boot with kernel, 2-11 PROM/flash boot without kernel, 2-10 PROM/flash/SPI boot with kernel, 2-9, 2-11 loader for ADSP-2106x/21160 processors, 3-1 loader for ADSP-21161 processors, 4-1 loader for ADSP-2126x/36x/37x processors, 5-1 loader for Blackfin (includes splitter) command-line syntax, 2-62, 2-65 default settings, 2-73 graphical user interface, 2-73 list of switches, 2-65 operations, 2-1 loader for TigerSHARC command-line syntax, 6-6 graphical user interface, 6-12 list of switches, 6-9 operations, 6-1 loader kernels, See boot kernels loader output, See output files loader switches, See switches by name loading, introduction to, 1-8 Load page Blackfin processors, 2-73 SHARC processors, 3-32, 4-32, 5-49 TigerSHARC processors, 6-12 Load (Splitter) page (Blackfin processors), 2-79 -l userkernel loader switch for Blackfin, 2-51, 2-68 loader switch for SHARC, 3-30, 4-30, 5-20, 5-40, 5-46 loader switch for TigerSHARC, 6-9, 6-10 INDEX M -M, loader switch for Blackfin, 2-68, 2-69 make files, 2-68, 2-69 .map (memory map) files, A-7 -maskaddr #, loader switch for Blackfin, 2-69 masking EPROM address bits, 2-69 master (host) boot, introduction to, 1-9 -MaxBlockSize #, loader switch for Blackfin, 2-69 -MaxZeroFillBlockSize #, loader switch for Blackfin, 2-69 memory map files (.map), A-7 memory ranges (Blackfin processors) ADSP-BF531/2/3/4/6/7/8/9 processors, 2-40 ADSP-BF535 processors, 2-14 ADSP-BF561/6 processors, 2-54 microcontroller data transfers, A-14 -MM, loader switch for Blackfin, 2-69 MODE1 register, 3-13 MODE2 register, 3-13, 3-14 -Mo filename, loader switch for Blackfin, 2-69 MOS1-0 pins (Blackfin processors) ADSP-BF531/2/3/4/6/7/8/9 processors, 2-24, 2-25 most significant bit first (MSB) format, 5-12 Motorola S-record file format, 6-9, A-11 MSBF bit, 5-9, 5-11 MS bit, 5-9, 5-11 MSWF register, 4-7, 4-11 -Mt filename, loader switch for Blackfin, 2-69 multiprocessor booting, introduction to, 1-9 multiprocessor systems (Blackfin processors), 2-52 See also dual-core systems VisualDSP++ 4.5 Loader and Utilities Manual I-11
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
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VisualDSP++ Documentation Set Prefa
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1 INTRODUCTION The majority of this
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Loader Command Line Introduction If
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Initialization Code Introduction In
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A brief description of each phase f
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Introduction Download the loadable
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Introduction You can run the loader
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PROM Boot Mode Introduction After r
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Boot Streams Introduction The loade
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2 LOADER/SPLITTER FOR BLACKFIN PROC
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Loader/Splitter for Blackfin Proces
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System Reset Configuration Register
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D7 OUTPUT .LDR FILE 4-BYTE HEADER F
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Second-Stage Loader Restrictions Lo
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SPI Memory Detection Routine Loader
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P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
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� Booting � SDRAM ADSP-BF536 pr
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1-0-Byte Block Header Block Data Lo
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� The Core B Loader/Splitter for
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INITIALIZATION CODE (KERNEL WITH DE
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FLASH MEMORY INIT CODE HEADER INIT
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where: � Command-line File Search
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Blackfin Loader Command-Line Switch
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Using Base Loader Loader/Splitter f
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Table 2-11. Base Load Page Settings
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Using Second-Stage Loader Loader/Sp
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3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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Boot Mode Selection Loader for ADSP
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File Searches Loader for ADSP-2106x
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-si-revision #|none|any Loader for
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4 LOADER FOR ADSP-21161 SHARC PROCE
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Loader for ADSP-21161 SHARC Process
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ADSP-21161 Processor Boot Streams L
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To Modify a Boot Kernel Source File
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Processor ID Numbers Loader for ADS
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File Searches Loader for ADSP-21161
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5 LOADER FOR ADSP-2126X/2136X/2137X
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Loader for ADSP-2126x/2136x/2137x S
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File Searches Loader for ADSP-2126x
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6 LOADER FOR TIGERSHARC PROCESSORS
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� EE-174: Loader for TigerSHARC P
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Page 241 and 242: Loader for TigerSHARC Processors el
Page 243 and 244: TigerSHARC Command-Line Switches Lo
Page 245 and 246: Loader for TigerSHARC Processors Ta
Page 247 and 248: 7 SPLITTER FOR SHARC AND TIGERSHARC
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Page 251 and 252: Splitter for SHARC and TigerSHARC P
Page 257 and 258: A FILE FORMATS VisualDSP++ developm
Page 259 and 260: Assembly Source Files File Formats
Page 261 and 262: Build Files File Formats Build file
Page 263 and 264: Memory Map Files File Formats The l
Page 265 and 266: Table A-4. End-of-File Record Examp
Page 267 and 268: This example shows how to include t
Page 269 and 270: Table A-7. S1 Termination Record Ex
Page 271 and 272: File Formats A block of data record
Page 273 and 274: Table A-9. SPORT Data File Example
Page 275 and 276: B UTILITIES The VisualDSP++ develop
Page 277 and 278: elf2flt - ELF to BFLT File Converte
Page 279 and 280: Table B-3. BFLT File Dumper Command
Page 281 and 282: I INDEX Numerics -64 splitter switc
Page 283 and 284: BMS pins ADSP-2106x/160 processors,
Page 285 and 286: data initialization files (.dat), A
Page 287 and 288: external memory (SHARC processors)
Page 289: initialization blocks (Blackfin pro
Page 293 and 294: P -p # loader switch for Blackfin,
Page 295 and 296: shared memory Blackfin processors,
Page 297 and 298: V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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