VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader/Splitter for Blackfin Processors
A global header’s bit assignments for 8- and 16-bit addressable SPI booting
are in Figure 2-13.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Baud rate: 0 = 500 kHz (default), 1 = 1 MHz, 2 = 2 MHz
Figure 2-13. SPI Boot: Global Header Bit Assignments
Blocks, Block Headers, and Flags
For application code, a block is the basic structure of the output .ldr file
when the second-stage loader is used. All application code is grouped into
blocks. A block always has a header and a body if it is a non-zero block. A
block does not have a body if it is a zero block. A block structure is illustrated
in Figure 2-14.
4 BYTES
N BYTES
4 BYTES
4 BYTES
4 BYTES
N1 BYTES
OUTPUT .LDR FILE
BYTE COUNT (N)
2 nd STAGE LOADER
2 nd STAGE LOADER
ADDRESS
GLOBAL HEADER
SIZE OF APPLICATION
CODE (N1)
APPLICATION CODE
Figure 2-14. Application Block
VisualDSP++ 4.5 Loader and Utilities Manual 2-13
0
SIZE OF APPLICATION
CODE (N1)
START ADDRESS
OF BLOCK 1
BYTE COUNT
OF BLOCK 1
FLAG FOR BLOCK 1
BODY OF BLOCK 1
START ADDRESS
OF BLOCK 2
BYTE COUNT
OF BLOCK 2
......
4 BYTES
4 BYTES
2 BYTES
BLOCK
HEADER
BLOCK