VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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Blackfin Processor Booting 10-Byte Block Header Block Data … LSB of the address field of the nth data block in 1st .dxe … 8–15 of the address field of the nth data block in 1st .dxe … 16–23 of the address field of the nth data block in 1st .dxe … MSB of the address field of the nth data block in 1st .dxe … LSB of the byte count of the nth data block in 1st .dxe … 8–15 of the byte count of the nth data block in 1st .dxe … 16–23 of the byte count of the nth data block in 1st .dxe … MSB of the byte count of the nth data block in 1st .dxe … LSB of the flag word of the nth block in 1st .dxe … MSB of the flag word of the nth block in 1st .dxe … And so on … … Byte 1 of the nth block of 1st .dxe … Byte 0 of the nth block of 1st .dxe … LSB of the address field of 2nd .dxe count block (no care) … 8–15 of the address field of 2nd .dxe count block (no care) … And so on… .dxe1 Block Data (Cont’d) .dxe1 Block Data (Cont’d) 10-Byte .dxe2 Header 2-48 VisualDSP++ 4.5 Loader and Utilities Manual
Loader/Splitter for Blackfin Processors ADSP-BF561/BF566 Processor Initialization Blocks The initialization block or a second-stage loader utility must be used to initialize the SDRAM memory of the ADSP-BF561/BF566 processor before any instructions or data are loaded into it. The initialization blocks are identified by a bit in the flag word of the 10-byte block header. When the boot ROM encounters the initialization blocks in the boot stream, it loads the blocks and executes them immediately. The initialization blocks must save and restore registers and return to the boot ROM, so the boot ROM can load the rest of the blocks. For more details, see “ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/ BF539 Blocks, Block Headers, and Flags” on page 2-33. Both the initialization block and second-stage loader utility can be used to force the boot ROM to load a specific .dxe file from the external memory device if the boot ROM stores multiple executable files. The initialization block can manipulate the R0 or R3 register, which the boot ROM uses as the external memory pointers for flash/PROM or SPI memory boot, respectively. After the processor returns from the execution of the initialization blocks, the boot ROM continues to load blocks from the location specified in the R0 or R3 register, which can be any .dxe file in the boot stream. This option requires the starting locations of specific executables within external memory. The R0 or R3 register must point to the 10-byte count header, as illustrated in “ADSP-BF53x and ADSP-BF561/BF566 Multi-Application (Multi-DXE) Management” on page 2-51. VisualDSP++ 4.5 Loader and Utilities Manual 2-49
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
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VisualDSP++ Documentation Set Prefa
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1 INTRODUCTION The majority of this
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Loader Command Line Introduction If
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Initialization Code Introduction In
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A brief description of each phase f
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Introduction Download the loadable
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Introduction You can run the loader
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Page 37 and 38: Boot Streams Introduction The loade
Page 39 and 40: 2 LOADER/SPLITTER FOR BLACKFIN PROC
Page 41 and 42: Loader/Splitter for Blackfin Proces
Page 43 and 44: System Reset Configuration Register
Page 49 and 50: D7 OUTPUT .LDR FILE 4-BYTE HEADER F
Page 53 and 54: Second-Stage Loader Restrictions Lo
Page 63 and 64: SPI Memory Detection Routine Loader
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Page 79 and 80: � Booting � SDRAM ADSP-BF536 pr
Page 85: 1-0-Byte Block Header Block Data Lo
Page 93 and 94: � The Core B Loader/Splitter for
Page 95 and 96: INITIALIZATION CODE (KERNEL WITH DE
Page 99 and 100: FLASH MEMORY INIT CODE HEADER INIT
Page 101 and 102: where: � Command-line File Search
Page 103 and 104: Blackfin Loader Command-Line Switch
Page 111 and 112: Using Base Loader Loader/Splitter f
Page 113 and 114: Table 2-11. Base Load Page Settings
Page 115 and 116: Using Second-Stage Loader Loader/Sp
Page 121 and 122: 3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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File Searches Loader for ADSP-2106x
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-si-revision #|none|any Loader for
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4 LOADER FOR ADSP-21161 SHARC PROCE
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Loader for ADSP-21161 SHARC Process
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ADSP-21161 Processor Boot Streams L
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To Modify a Boot Kernel Source File
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Processor ID Numbers Loader for ADS
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File Searches Loader for ADSP-21161
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5 LOADER FOR ADSP-2126X/2136X/2137X
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Loader for ADSP-2126x/2136x/2137x S
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File Searches Loader for ADSP-2126x
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6 LOADER FOR TIGERSHARC PROCESSORS
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� EE-174: Loader for TigerSHARC P
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Boot Kernel Modification Loader for
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Loader for TigerSHARC Processors el
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TigerSHARC Command-Line Switches Lo
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Loader for TigerSHARC Processors Ta
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7 SPLITTER FOR SHARC AND TIGERSHARC
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� Most Splitter for SHARC and Tig
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Splitter for SHARC and TigerSHARC P
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A FILE FORMATS VisualDSP++ developm
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Assembly Source Files File Formats
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Build Files File Formats Build file
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Memory Map Files File Formats The l
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Table A-4. End-of-File Record Examp
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This example shows how to include t
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Table A-7. S1 Termination Record Ex
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File Formats A block of data record
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Table A-9. SPORT Data File Example
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B UTILITIES The VisualDSP++ develop
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elf2flt - ELF to BFLT File Converte
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Table B-3. BFLT File Dumper Command
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I INDEX Numerics -64 splitter switc
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BMS pins ADSP-2106x/160 processors,
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data initialization files (.dat), A
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external memory (SHARC processors)
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initialization blocks (Blackfin pro
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loader file formats (ADSP-BF535 pro
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P -p # loader switch for Blackfin,
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shared memory Blackfin processors,
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V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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