VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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fltdump – BFLT File Dumper B-6 VisualDSP++ 4.5 Loader and Utilities Manual
I INDEX Numerics -64 splitter switch, 7-5 16- to 48-bit word packing, 3-12 32- to 16-bit word packing, 5-6 32- to 8-bit word packing, 5-6 48- to 8-bit word packing, 3-9 4- to 48-bit word packing, 3-15 8- to 48-bit word packing, 3-10, 3-11, 3-12, 4-5, 4-9 A ACK pin, 3-8, 3-11, 3-13, 4-7 ADDR23-0 address lines, 4-8 ADDR31-0 address lines, 3-10 address records, linear format, A-7 ADSP-2106x/160 processors ADSP-21060/061/062 boot modes, 3-2, 3-5 ADSP-21065L boot modes, 3-2, 3-6 ADSP-21160 boot modes, 3-2, 3-5 boot sequence, 3-3 direct memory access, See DMA, DMACx ADSP-21161 processors boot modes, 4-2, 4-5 boot sequence, 4-3 direct memory access, See DMA, DMACx multiprocessor support, 4-21 ADSP-2126x/36x/37x processors boot modes, 5-2, 5-4, 5-8 boot sequence, 5-3 compression support, 5-35 direct memory access, See DMA, DMACx ADSP-2136x/37x processors multiprocessor support, 5-33 ADSP-BF531/2/3/4/6/7/8/9 processors ADSP-BF534/6/7 (only) boot modes, 2-17 boot modes, 2-16 boot sequence, 2-20 boot streams, 2-33 compression support, 2-55 memory ranges, 2-40 on-chip boot ROM, 2-16, 2-19, 2-21, 2-25, 2-40, 2-52 ADSP-BF535 processors boot modes, 2-2, 2-79 boot sequence, 2-5 boot streams, 2-8, 2-9 memory ranges, 2-14 on-chip boot ROM, 2-2, 2-4, 2-6 second stage loader, 2-6 ADSP-BF561/6 processors boot modes, 2-42 boot streams, 2-44, 2-46 dual-core architecture, 2-42, 2-44 memory ranges, 2-54 multiprocessor support, 2-50 on-chip boot ROM, 2-42, 2-44, 2-49, 2-50, 2-52, 2-54 .ALIGN directive, 2-15 application See also blocks of application code loading, introduction to, 1-14 code start address, 2-70, 2-74, 3-4, 3-18, 4-5 development flow, 1-6 VisualDSP++ 4.5 Loader and Utilities Manual I-1
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
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VisualDSP++ Documentation Set Prefa
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1 INTRODUCTION The majority of this
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Loader Command Line Introduction If
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Initialization Code Introduction In
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A brief description of each phase f
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Introduction Download the loadable
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Introduction You can run the loader
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PROM Boot Mode Introduction After r
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Boot Streams Introduction The loade
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2 LOADER/SPLITTER FOR BLACKFIN PROC
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Loader/Splitter for Blackfin Proces
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System Reset Configuration Register
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D7 OUTPUT .LDR FILE 4-BYTE HEADER F
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Second-Stage Loader Restrictions Lo
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SPI Memory Detection Routine Loader
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P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
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� Booting � SDRAM ADSP-BF536 pr
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1-0-Byte Block Header Block Data Lo
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� The Core B Loader/Splitter for
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INITIALIZATION CODE (KERNEL WITH DE
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FLASH MEMORY INIT CODE HEADER INIT
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where: � Command-line File Search
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Blackfin Loader Command-Line Switch
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Using Base Loader Loader/Splitter f
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Table 2-11. Base Load Page Settings
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Using Second-Stage Loader Loader/Sp
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3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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Boot Mode Selection Loader for ADSP
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File Searches Loader for ADSP-2106x
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-si-revision #|none|any Loader for
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4 LOADER FOR ADSP-21161 SHARC PROCE
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Loader for ADSP-21161 SHARC Process
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ADSP-21161 Processor Boot Streams L
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To Modify a Boot Kernel Source File
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Processor ID Numbers Loader for ADS
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File Searches Loader for ADSP-21161
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5 LOADER FOR ADSP-2126X/2136X/2137X
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Loader for ADSP-2126x/2136x/2137x S
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File Searches Loader for ADSP-2126x
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Page 235 and 236: 6 LOADER FOR TIGERSHARC PROCESSORS
Page 237 and 238: � EE-174: Loader for TigerSHARC P
Page 239 and 240: Boot Kernel Modification Loader for
Page 241 and 242: Loader for TigerSHARC Processors el
Page 243 and 244: TigerSHARC Command-Line Switches Lo
Page 245 and 246: Loader for TigerSHARC Processors Ta
Page 247 and 248: 7 SPLITTER FOR SHARC AND TIGERSHARC
Page 249 and 250: � Most Splitter for SHARC and Tig
Page 251 and 252: Splitter for SHARC and TigerSHARC P
Page 257 and 258: A FILE FORMATS VisualDSP++ developm
Page 259 and 260: Assembly Source Files File Formats
Page 261 and 262: Build Files File Formats Build file
Page 263 and 264: Memory Map Files File Formats The l
Page 265 and 266: Table A-4. End-of-File Record Examp
Page 267 and 268: This example shows how to include t
Page 269 and 270: Table A-7. S1 Termination Record Ex
Page 271 and 272: File Formats A block of data record
Page 273 and 274: Table A-9. SPORT Data File Example
Page 275 and 276: B UTILITIES The VisualDSP++ develop
Page 277 and 278: elf2flt - ELF to BFLT File Converte
Page 279: Table B-3. BFLT File Dumper Command
Page 283 and 284: BMS pins ADSP-2106x/160 processors,
Page 285 and 286: data initialization files (.dat), A
Page 287 and 288: external memory (SHARC processors)
Page 289 and 290: initialization blocks (Blackfin pro
Page 291 and 292: loader file formats (ADSP-BF535 pro
Page 293 and 294: P -p # loader switch for Blackfin,
Page 295 and 296: shared memory Blackfin processors,
Page 297 and 298: V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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