VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Blackfin Processor Booting
ADSP-BF531/BF532/BF533/BF534/BF536/BF537/BF538/
BF539 Processor Memory Ranges
The on-chip boot ROM on ADSP-BF531/BF532/BF533/BF534/BF536/
BF537/BF538/BF539 Blackfin processors allows booting to the following
memory ranges.
L1 memory
ADSP-BF531 processor:
� Data bank A SRAM (0xFF80 4000–0xFF80 7FFF)
� Instruction SRAM (0xFFA0 8000–0xFFA0 BFFF)
ADSP-BF532 processor:
� Data bank A SRAM (0xFF80 4000–0xFF80 7FFF)
� Data bank B SRAM (0xFF90 4000–0xFF90 7FFF)
� Instruction SRAM (0xFFA0 8000–0xFFA1 3FFF)
ADSP-BF533 processor:
� Data bank A SRAM (0xFF80 0000–0xFF80 7FFF)
� Data bank B SRAM (0xFF90 000–0xFF90 7FFF)
� Instruction SRAM (0xFFA0 0000–0xFFA1 3FFF)
ADSP-BF534 processor:
� Data bank A SRAM (0xFF80 0000–0xFF80 7FFF)
� Data bank B SRAM (0xFF90 0000–0xFF90 7FFF)
� Instruction SRAM (0xFFA0 0000–0xFFA1 3FFF)
2-40 VisualDSP++ 4.5 Loader and Utilities Manual