VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader for ADSP-2126x/2136x/2137x SHARC Processors
The ADSP-2126x/2136x/2137x processor uses eleven block tags, a lesser
number of tags compared to other SHARC predecessors. There is only
one initialization tag per width because there is no need to draw distinction
between pm and dm sections during initialization. The same tag is used
for 16-bit (short word), 32-bit (normal word), and 64-bit (long word)
blocks that contain only zeros. The 0x1 tag is used for ZERO_INIT blocks of
16-bit, 32-bit, and 64-bit words. The 0x2 tag is used for ZERO_INIT blocks
of 40-bit data and 48-bit instructions.
For clarity, the letter L has been added to the names of the internal block
tags. L indicates that the associated section header uses the logical word
count and logical address. Previous SHARC boot kernels do not use logical
values. For example, the count for a 16-bit block may be the number
of 32-bit words rather than the actual number of 16-bit words.
Only four tags are required to handle an external memory, two for each
packing mode (see “Packing Options for External Memory” on page 5-6)
because parallel port DMA is the only way to access the external memory.
The external memory can be accessed only via the physical address of the
memory. This means that each 32-bit word corresponds to either four (for
8-bit) or two (for 16-bit) external addresses. The EXT appended to the
name of the block tag indicates that the address is a physical external
address.
The 0xB tag is for multiprocessor systems, exclusively supported on
ADSP-21367/21368/21369 and ADSP-2137x processors. The tag indicates
that the header is a processor ID header with the ID values and offset
values stored in the header.
Two data tags, USER_MESG and FINAL_INIT, differ from the standard format
for other SHARC data tags. The USER_MESG header is described
on page 5-17 and the FINAL_INIT header on page 5-29.
VisualDSP++ 4.5 Loader and Utilities Manual 5-25